{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/69559"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/69559","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Compiler Memory Management and Compound Function Definition for Multiprocessors","abstract":"The first part of this thesis deals with managing data in the multi-level memories of a tightly-coupled multiprocessor. One of the problems with this type of multiprocessor is the slow global memory. We examine how a compiler can use data dependence information to determine how data is used in a program, and then transform the program to exploit features in the multiprocessor's architecture to reduce the program's memory access time. The compiler/architecture techniques this thesis examines are allocating data to faster local memories, using a pipelined interconnection network, and overlapping global memory access with other operations. We present data from Parafrase-based experiments that measure the effectiveness of these techniques.","abstract_html":"The first part of this thesis deals with managing data in the multi-level memories of a tightly-coupled multiprocessor. One of the problems with this type of multiprocessor is the slow global memory. We examine how a compiler can use data dependence information to determine how data is used in a program, and then transform the program to exploit features in the multiprocessor's architecture to reduce the program's memory access time. The compiler/architecture techniques this thesis examines are allocating data to faster local memories, using a pipelined interconnection network, and overlapping global memory access with other operations. We present data from Parafrase-based experiments that measure the effectiveness of these techniques.","abstract_has_math":false,"creators":["Husmann, Harlan Edward"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"Ph.D.","degree_level":"Dissertation","degree_discipline":"Computer Science","degree_department":null,"school":null,"contributors":[],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2014,"date_issued":"2014-12-15T19:25:47Z","date_published":"2014-12-15T19:25:47Z","updated_at":"2026-07-22T22:26:01Z","subjects":["Computer Science"],"languages":[],"rights":[],"rights_urls":[],"identifier_entries":[{"key":"dc:identifier","label":"Identifier","values":["(UMI)AAI8701513"],"render_values":[{"text":"(UMI)AAI8701513","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/2142/69559","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:creator","label":"Author","values":["Husmann, Harlan Edward"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2014-12-15T19:25:47Z","10000-01-01","1986"]},{"key":"dc:type","label":"Dc Type","values":["text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Computer Science"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Dissertation"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph.D."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Computer Science"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/69559","(UMI)AAI8701513"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["The first part of this thesis deals with managing data in the multi-level memories of a tightly-coupled multiprocessor. One of the problems with this type of multiprocessor is the slow global memory. We examine how a compiler can use data dependence information to determine how data is used in a program, and then transform the program to exploit features in the multiprocessor's architecture to reduce the program's memory access time. The compiler/architecture techniques this thesis examines are allocating data to faster local memories, using a pipelined interconnection network, and overlapping global memory access with other operations. We present data from Parafrase-based experiments that measure the effectiveness of these techniques.","The second part of this thesis examines two algorithms for partitioning a program into compound functions (tasks) for the multiprocessor. One algorithm examines the amount of parallelism in each loop of a program to find compound functions. The other algorithm estimates performance for every different way the loops in a program can execute (i.e., serial or parallel). After all estimates have been compared, the program is partitioned to minimize the overall execution time of the program. The effectiveness of these two algorithms is shown with empirical data gathered with Parafrase.","Made available in DSpace on 2014-12-15T19:25:47Z (GMT). No. of bitstreams: 1 8701513.pdf: 6567070 bytes, checksum: fce043682e5d40e07da661974ed1e409 (MD5) Previous issue date: 1986","Embargo set by: Seth Robbins for item 69725 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","U of I Only","202 p.","Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1986."]},{"key":"dc:title","label":"Title","values":["Compiler Memory Management and Compound Function Definition for Multiprocessors"]}]}],"canonical_facts":{"dc:creator":["Husmann, Harlan Edward"],"dc:date":["2014-12-15T19:25:47Z","10000-01-01","1986"],"dc:description":["The first part of this thesis deals with managing data in the multi-level memories of a tightly-coupled multiprocessor. One of the problems with this type of multiprocessor is the slow global memory. We examine how a compiler can use data dependence information to determine how data is used in a program, and then transform the program to exploit features in the multiprocessor's architecture to reduce the program's memory access time. The compiler/architecture techniques this thesis examines are allocating data to faster local memories, using a pipelined interconnection network, and overlapping global memory access with other operations. We present data from Parafrase-based experiments that measure the effectiveness of these techniques.","The second part of this thesis examines two algorithms for partitioning a program into compound functions (tasks) for the multiprocessor. One algorithm examines the amount of parallelism in each loop of a program to find compound functions. The other algorithm estimates performance for every different way the loops in a program can execute (i.e., serial or parallel). After all estimates have been compared, the program is partitioned to minimize the overall execution time of the program. The effectiveness of these two algorithms is shown with empirical data gathered with Parafrase.","Made available in DSpace on 2014-12-15T19:25:47Z (GMT). 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