{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/69355"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/69355","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Hierarchical Approaches to Vlsi Circuit Layout","abstract":"This thesis studies two hierarchical approaches to the circuit layout problem: the top-down approach and the bottom-up approach.","abstract_html":"This thesis studies two hierarchical approaches to the circuit layout problem: the top-down approach and the bottom-up approach.","abstract_has_math":false,"creators":["Sarrafzadeh, Majid"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"Ph.D.","degree_level":"Dissertation","degree_discipline":"Electrical Engineering","degree_department":null,"school":null,"contributors":[],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2014,"date_issued":"2014-12-15T19:05:16Z","date_published":"2014-12-15T19:05:16Z","updated_at":"2026-07-22T22:26:00Z","subjects":["Engineering, Electronics and Electrical"],"languages":[],"rights":[],"rights_urls":[],"identifier_entries":[{"key":"dc:identifier","label":"Identifier","values":["(UMI)AAI8711870"],"render_values":[{"text":"(UMI)AAI8711870","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/2142/69355","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:creator","label":"Author","values":["Sarrafzadeh, Majid"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2014-12-15T19:05:16Z","10000-01-01","1987"]},{"key":"dc:type","label":"Dc Type","values":["text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Dissertation"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph.D."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Engineering, Electronics and Electrical"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/69355","(UMI)AAI8711870"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["This thesis studies two hierarchical approaches to the circuit layout problem: the top-down approach and the bottom-up approach.","The first part is devoted to the traditional top-down approach, and particularly, to an important subproblem thereof called the Channel Routing Problem (CRP). The complexity of CRP in three different layout modes--the reserved mode, the knock-knee mode, and the restricted-overlap mode--is studied. Besides the conventional square grid, two new grids, the alternate grid and the 45(DEGREES) grid, are considered, and their respective versatility is assessed.","In the second part, a novel bottom-up technique for solving the layout problem is proposed. The strategy is to recursively interconnect a set of modules, in conformity with the design rules. The basic step consists of merging a pair of strongly-connected modules. This technique is elaborated on and the fundamental problems of this approach are discussed.","Made available in DSpace on 2014-12-15T19:05:16Z (GMT). No. of bitstreams: 1 8711870.pdf: 3029342 bytes, checksum: 599a5a2f77a0da70f744381ec73fb30a (MD5) Previous issue date: 1987","Embargo set by: Seth Robbins for item 69521 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","U of I Only","105 p.","Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1987."]},{"key":"dc:title","label":"Title","values":["Hierarchical Approaches to Vlsi Circuit Layout"]}]}],"canonical_facts":{"dc:creator":["Sarrafzadeh, Majid"],"dc:date":["2014-12-15T19:05:16Z","10000-01-01","1987"],"dc:description":["This thesis studies two hierarchical approaches to the circuit layout problem: the top-down approach and the bottom-up approach.","The first part is devoted to the traditional top-down approach, and particularly, to an important subproblem thereof called the Channel Routing Problem (CRP). The complexity of CRP in three different layout modes--the reserved mode, the knock-knee mode, and the restricted-overlap mode--is studied. Besides the conventional square grid, two new grids, the alternate grid and the 45(DEGREES) grid, are considered, and their respective versatility is assessed.","In the second part, a novel bottom-up technique for solving the layout problem is proposed. The strategy is to recursively interconnect a set of modules, in conformity with the design rules. The basic step consists of merging a pair of strongly-connected modules. This technique is elaborated on and the fundamental problems of this approach are discussed.","Made available in DSpace on 2014-12-15T19:05:16Z (GMT). No. of bitstreams: 1 8711870.pdf: 3029342 bytes, checksum: 599a5a2f77a0da70f744381ec73fb30a (MD5) Previous issue date: 1987","Embargo set by: Seth Robbins for item 69521 Lift date: Forever Reason: Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","Restricted to the U of I community idenfinitely during batch ingest of legacy ETDs","U of I Only","105 p.","Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1987."],"dc:identifier":["http://hdl.handle.net/2142/69355","(UMI)AAI8711870"],"dc:subject":["Engineering, Electronics and Electrical"],"dc:title":["Hierarchical Approaches to Vlsi Circuit Layout"],"dc:type":["text"],"thesis:degree_discipline":["Electrical Engineering"],"thesis:degree_level":["Dissertation"],"thesis:degree_name":["Ph.D."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:26:00Z"}