{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/42364"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/42364","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Analog and mixed-signal circuitry for system-assisted high-speed I/O links","abstract":"The state-of-the-art design methodology for high-speed I/O links is to specify component-level design requirements to achieve high-fidelity component-level performance. While designing each component in the link with high fidelity guarantees a reliable link, it does not inherently optimize the link for metrics such as the power, design complexity, or bit error rate performance. Recently, due to the increased demand for data bandwidth in backplane I/O, a system-assisted design methodology has been developed to optimize the system for a given set of metrics. By optimizing on the system level rather than the component level, the performance at the component level can be reduced from high quality to sufficient when the component is deployed within the I/O link. The new system-level design methodology encourages the utilization of novel circuit architectures. In this dissertation, novel analog and mixed-signal circuitry for system-assisted high-speed I/O links is presented. The novel circuitry expands upon traditional analog and mixed-signal circuit architectures in order to achieve system-level design goals and requirements without significant power or area overhead.","abstract_html":"The state-of-the-art design methodology for high-speed I/O links is to specify component-level design requirements to achieve high-fidelity component-level performance. While designing each component in the link with high fidelity guarantees a reliable link, it does not inherently optimize the link for metrics such as the power, design complexity, or bit error rate performance. Recently, due to the increased demand for data bandwidth in backplane I/O, a system-assisted design methodology has been developed to optimize the system for a given set of metrics. By optimizing on the system level rather than the component level, the performance at the component level can be reduced from high quality to sufficient when the component is deployed within the I/O link. The new system-level design methodology encourages the utilization of novel circuit architectures. In this dissertation, novel analog and mixed-signal circuitry for system-assisted high-speed I/O links is presented. The novel circuitry expands upon traditional analog and mixed-signal circuit architectures in order to achieve system-level design goals and requirements without significant power or area overhead.","abstract_has_math":false,"creators":["Faust, Adam"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"Ph.D.","degree_level":"Dissertation","degree_discipline":"Electrical & Computer Engr","degree_department":null,"school":null,"contributors":["Rosenbaum, Elyse","Feng, Milton","Shanbhag, Naresh R.","Schutt-Ainé, José E."],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2013,"date_issued":"2013-02-03T19:36:30Z","date_published":"2013-02-03T19:36:30Z","updated_at":"2026-07-22T22:25:33Z","subjects":["Mixed-Signal","Analog","Electrostatic discharge (ESD)","Gm-boosting","Coding"],"languages":["en"],"rights":["Copyright 2012 Adam Faust"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/2142/42364","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Rosenbaum, Elyse","Feng, Milton","Shanbhag, Naresh R.","Schutt-Ainé, José E."]},{"key":"dc:creator","label":"Author","values":["Faust, Adam"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2013-02-03T19:36:30Z","2012-12"]},{"key":"dc:type","label":"Dc Type","values":["text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical & Computer Engr"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Dissertation"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph.D."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Mixed-Signal","Analog","Electrostatic discharge (ESD)","Gm-boosting","Coding"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 2012 Adam Faust"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/42364"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["The state-of-the-art design methodology for high-speed I/O links is to specify component-level design requirements to achieve high-fidelity component-level performance. While designing each component in the link with high fidelity guarantees a reliable link, it does not inherently optimize the link for metrics such as the power, design complexity, or bit error rate performance. Recently, due to the increased demand for data bandwidth in backplane I/O, a system-assisted design methodology has been developed to optimize the system for a given set of metrics. By optimizing on the system level rather than the component level, the performance at the component level can be reduced from high quality to sufficient when the component is deployed within the I/O link. The new system-level design methodology encourages the utilization of novel circuit architectures. In this dissertation, novel analog and mixed-signal circuitry for system-assisted high-speed I/O links is presented. The novel circuitry expands upon traditional analog and mixed-signal circuit architectures in order to achieve system-level design goals and requirements without significant power or area overhead.","Item withdrawn by Mark Zulauf (zulauf@illinois.edu) on 2012-08-27T15:43:54Z Item was in collections: University of Illinois Theses & Dissertations (ID: 1) No. of bitstreams: 2 Faust_Adam.docx: 9754072 bytes, checksum: eaf88bebd49732c2adcdccb35caf6cdd (MD5) Faust_Adam.pdf: 4305252 bytes, checksum: 738ed34713736ba8683ecced26949dcd (MD5)","Made available in DSpace on 2013-02-03T19:36:30Z (GMT). No. of bitstreams: 3 Adam_Faust.pdf: 4305252 bytes, checksum: 738ed34713736ba8683ecced26949dcd (MD5) Faust_Adam.docx: 9754072 bytes, checksum: eaf88bebd49732c2adcdccb35caf6cdd (MD5) license.txt: 4059 bytes, checksum: 18ce1d5c7570b356dde8ada24b3273fa (MD5)"]},{"key":"dc:title","label":"Title","values":["Analog and mixed-signal circuitry for system-assisted high-speed I/O links"]}]}],"canonical_facts":{"dc:contributor":["Rosenbaum, Elyse","Feng, Milton","Shanbhag, Naresh R.","Schutt-Ainé, José E."],"dc:creator":["Faust, Adam"],"dc:date":["2013-02-03T19:36:30Z","2012-12"],"dc:description":["The state-of-the-art design methodology for high-speed I/O links is to specify component-level design requirements to achieve high-fidelity component-level performance. While designing each component in the link with high fidelity guarantees a reliable link, it does not inherently optimize the link for metrics such as the power, design complexity, or bit error rate performance. Recently, due to the increased demand for data bandwidth in backplane I/O, a system-assisted design methodology has been developed to optimize the system for a given set of metrics. By optimizing on the system level rather than the component level, the performance at the component level can be reduced from high quality to sufficient when the component is deployed within the I/O link. The new system-level design methodology encourages the utilization of novel circuit architectures. In this dissertation, novel analog and mixed-signal circuitry for system-assisted high-speed I/O links is presented. The novel circuitry expands upon traditional analog and mixed-signal circuit architectures in order to achieve system-level design goals and requirements without significant power or area overhead.","Item withdrawn by Mark Zulauf (zulauf@illinois.edu) on 2012-08-27T15:43:54Z Item was in collections: University of Illinois Theses & Dissertations (ID: 1) No. of bitstreams: 2 Faust_Adam.docx: 9754072 bytes, checksum: eaf88bebd49732c2adcdccb35caf6cdd (MD5) Faust_Adam.pdf: 4305252 bytes, checksum: 738ed34713736ba8683ecced26949dcd (MD5)","Made available in DSpace on 2013-02-03T19:36:30Z (GMT). No. of bitstreams: 3 Adam_Faust.pdf: 4305252 bytes, checksum: 738ed34713736ba8683ecced26949dcd (MD5) Faust_Adam.docx: 9754072 bytes, checksum: eaf88bebd49732c2adcdccb35caf6cdd (MD5) license.txt: 4059 bytes, checksum: 18ce1d5c7570b356dde8ada24b3273fa (MD5)"],"dc:identifier":["http://hdl.handle.net/2142/42364"],"dc:language":["en"],"dc:rights":["Copyright 2012 Adam Faust"],"dc:subject":["Mixed-Signal","Analog","Electrostatic discharge (ESD)","Gm-boosting","Coding"],"dc:title":["Analog and mixed-signal circuitry for system-assisted high-speed I/O links"],"dc:type":["text"],"thesis:degree_discipline":["Electrical & Computer Engr"],"thesis:degree_level":["Dissertation"],"thesis:degree_name":["Ph.D."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:25:33Z"}