{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/42300"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/42300","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Tutorial on designing and implementing a direct digital synthesizer (DDS) on a field programmable gate array (FPGA)","abstract":"Many telecommunication applications require a fast switching, fine tuning and superior quality sinusoidal signal source for their components. One such a frequency synthesizer is a direct digital synthesizer (DDS). This thesis work utilizes a design that aims to combine digital circuit design and electronic communication knowledge, and apply them in a practical environment. It does so by providing a tutorial on designing and implementing a DDS on an FPGA using Xilinx’s ISE software. The thesis also examines the final results and shows the unwanted spurs that are generated. Since this is purely a digital design, it does not implement a digital-to-analog converter (DAC) or a low-pass filter. Using a Virtex 6 design for the FPGA, one can achieve close to perfect sinusoids, without any phase change, with varying frequency tuning words (FTWs).","abstract_html":"Many telecommunication applications require a fast switching, fine tuning and superior quality sinusoidal signal source for their components. One such a frequency synthesizer is a direct digital synthesizer (DDS). This thesis work utilizes a design that aims to combine digital circuit design and electronic communication knowledge, and apply them in a practical environment. It does so by providing a tutorial on designing and implementing a DDS on an FPGA using Xilinx’s ISE software. The thesis also examines the final results and shows the unwanted spurs that are generated. Since this is purely a digital design, it does not implement a digital-to-analog converter (DAC) or a low-pass filter. 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