{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/23348"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/23348","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Probabilistic simulation for reliability and average power estimation","abstract":"The trend in the integrated circuit industry towards an ever greater miniaturization of circuit components accentuated reliability problems such as electromigration in the power buses, hot-carrier degradation of transistors, and excessive power consumption, which ultimately resulted in chip failures. This brought forward the need for simulation tools that would evaluate the susceptibility to the aforementioned hazards before the actual fabrication process.","abstract_html":"The trend in the integrated circuit industry towards an ever greater miniaturization of circuit components accentuated reliability problems such as electromigration in the power buses, hot-carrier degradation of transistors, and excessive power consumption, which ultimately resulted in chip failures. This brought forward the need for simulation tools that would evaluate the susceptibility to the aforementioned hazards before the actual fabrication process.","abstract_has_math":false,"creators":["Stamoulis, Georgios Ioannis"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"Ph.D.","degree_level":"Dissertation","degree_discipline":"Electrical and Computer Engineering","degree_department":null,"school":null,"contributors":["Hajj, Ibrahim N."],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2011,"date_issued":"2011-05-07T14:10:58Z","date_published":"2011-05-07T14:10:58Z","updated_at":"2026-07-22T22:25:21Z","subjects":["Engineering, Electronics and Electrical"],"languages":["eng"],"rights":["Copyright 1994 Stamoulis, Georgios Ioannis"],"rights_urls":[],"identifier_entries":[{"key":"dc:identifier","label":"Identifier","values":["AAI9503329","(UMI)AAI9503329"],"render_values":[{"text":"AAI9503329","href":null,"code":true},{"text":"(UMI)AAI9503329","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/2142/23348","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Hajj, Ibrahim N."]},{"key":"dc:creator","label":"Author","values":["Stamoulis, Georgios Ioannis"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2011-05-07T14:10:58Z","10000-01-01","1994"]},{"key":"dc:type","label":"Dc Type","values":["text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical and Computer Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Dissertation"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph.D."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Engineering, Electronics and Electrical"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["eng"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 1994 Stamoulis, Georgios Ioannis"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["AAI9503329","(UMI)AAI9503329","http://hdl.handle.net/2142/23348"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["The trend in the integrated circuit industry towards an ever greater miniaturization of circuit components accentuated reliability problems such as electromigration in the power buses, hot-carrier degradation of transistors, and excessive power consumption, which ultimately resulted in chip failures. This brought forward the need for simulation tools that would evaluate the susceptibility to the aforementioned hazards before the actual fabrication process.","As an answer to the above concerns, a probabilistic simulation strategy is proposed in this thesis, which provides a quick yet reliable estimate of the electromigration and hot-carrier degradation of a circuits and its average power consumption. This work expands on previously proposed concepts and introduces new ones, to establish the validity and the accuracy of the probabilistic simulation approach.","The focus of this research was on issues concerning the simulation of one channel-connected subcircuit (gate) as well as on problems related to the simulation of an entire circuit. More specifically, in the subcircuit level, a new algorithm for probabilistic graph elimination is proposed, a new delay estimation methodology, and new models for estimating the average current drawn by each gate. At the circuit level, event merging is introduced, and the problem of correlation is addressed through the study of many different approaches, all of which are introduced in this work. The scope of probabilistic simulation is expanded to sequential circuits by the introduction of an algorithm for this purpose. Finally, an extended probabilistic waveform model is introduced, a model allowing finite voltage signal slopes, which further enhances the accuracy of probabilistic analysis and lays the foundation for future work.","Made available in DSpace on 2011-05-07T14:10:58Z (GMT). No. of bitstreams: 2 license.txt: 4922 bytes, checksum: 910b249b4beec47e7ab768910c8f966f (MD5) 9503329.pdf: 3938654 bytes, checksum: a5ea4705cadf3c001441dd4a6e2a3e15 (MD5) Previous issue date: 1994","Item marked as restricted to the 'UIUC Users [automated]' Group (id=2) by Howard Ding (hding2@illinois.edu) on 2011-05-07T15:03:52Z Item is restricted indefinitely.","Restriction data tranferred 2014-07-01T11:30:28-05:00 Original Data Group with Access UIUC Users [automated] Release Date: none Reason: ETDs are only available to UIUC Users without author permission","ETDs are only available to UIUC Users without author permission","U of I Only"]},{"key":"dc:title","label":"Title","values":["Probabilistic simulation for reliability and average power estimation"]}]}],"canonical_facts":{"dc:contributor":["Hajj, Ibrahim N."],"dc:creator":["Stamoulis, Georgios Ioannis"],"dc:date":["2011-05-07T14:10:58Z","10000-01-01","1994"],"dc:description":["The trend in the integrated circuit industry towards an ever greater miniaturization of circuit components accentuated reliability problems such as electromigration in the power buses, hot-carrier degradation of transistors, and excessive power consumption, which ultimately resulted in chip failures. This brought forward the need for simulation tools that would evaluate the susceptibility to the aforementioned hazards before the actual fabrication process.","As an answer to the above concerns, a probabilistic simulation strategy is proposed in this thesis, which provides a quick yet reliable estimate of the electromigration and hot-carrier degradation of a circuits and its average power consumption. This work expands on previously proposed concepts and introduces new ones, to establish the validity and the accuracy of the probabilistic simulation approach.","The focus of this research was on issues concerning the simulation of one channel-connected subcircuit (gate) as well as on problems related to the simulation of an entire circuit. More specifically, in the subcircuit level, a new algorithm for probabilistic graph elimination is proposed, a new delay estimation methodology, and new models for estimating the average current drawn by each gate. At the circuit level, event merging is introduced, and the problem of correlation is addressed through the study of many different approaches, all of which are introduced in this work. The scope of probabilistic simulation is expanded to sequential circuits by the introduction of an algorithm for this purpose. Finally, an extended probabilistic waveform model is introduced, a model allowing finite voltage signal slopes, which further enhances the accuracy of probabilistic analysis and lays the foundation for future work.","Made available in DSpace on 2011-05-07T14:10:58Z (GMT). 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