{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/23148"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/23148","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Statistical design of MOS VLSI circuits with designed experiments","abstract":"Many methods for the statistical design and analysis of integrated circuits have been proposed over the past years. However, these methods typically require a large number of computationally expensive circuit simulator runs, and their applications are limited to small circuits.","abstract_html":"Many methods for the statistical design and analysis of integrated circuits have been proposed over the past years. However, these methods typically require a large number of computationally expensive circuit simulator runs, and their applications are limited to small circuits.","abstract_has_math":false,"creators":["Yu, Tat Kwan Edgar"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"Ph.D.","degree_level":"Dissertation","degree_discipline":"Electrical Engineering","degree_department":null,"school":null,"contributors":["Kang, Sung Mo"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2011,"date_issued":"2011-05-07T14:03:52Z","date_published":"2011-05-07T14:03:52Z","updated_at":"2026-07-22T22:25:21Z","subjects":["Engineering, Electronics and Electrical"],"languages":["eng"],"rights":["Copyright 1989 Yu, Tat-Kwan Edgar"],"rights_urls":[],"identifier_entries":[{"key":"dc:identifier","label":"Identifier","values":["AAI9011087","(UMI)AAI9011087"],"render_values":[{"text":"AAI9011087","href":null,"code":true},{"text":"(UMI)AAI9011087","href":null,"code":true}]}]},"links":{"outbound_url":"http://hdl.handle.net/2142/23148","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Kang, Sung Mo"]},{"key":"dc:creator","label":"Author","values":["Yu, Tat Kwan Edgar"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2011-05-07T14:03:52Z","10000-01-01","1989"]},{"key":"dc:type","label":"Dc Type","values":["text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Dissertation"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph.D."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Engineering, Electronics and Electrical"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["eng"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 1989 Yu, Tat-Kwan Edgar"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["AAI9011087","(UMI)AAI9011087","http://hdl.handle.net/2142/23148"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Many methods for the statistical design and analysis of integrated circuits have been proposed over the past years. However, these methods typically require a large number of computationally expensive circuit simulator runs, and their applications are limited to small circuits.","This research investigated new approaches for the statistical design and analysis of MOS integrated circuits. This work has resulted in a new and efficient circuit performance modeling approach to statistical design. The proposed approach approximates the circuit performances, such as gain and delay, by fitted models of the inputs to the circuit simulator. The computationally inexpensive fitted models are then used as surrogates of the circuit simulator to predict and optimize the parametric yield and to achieve off-line quality control. The use of statistical design and analysis of experiments for model construction have been investigated theoretically and experimentally, and different methods to assess the adequacy of a fitted performance model have been studied.","Made available in DSpace on 2011-05-07T14:03:52Z (GMT). No. of bitstreams: 2 license.txt: 4922 bytes, checksum: 910b249b4beec47e7ab768910c8f966f (MD5) 9011087.pdf: 3227098 bytes, checksum: fd9c2bdf9b38289e40aa230a1feea9b3 (MD5) Previous issue date: 1989","Item marked as restricted to the 'UIUC Users [automated]' Group (id=2) by Howard Ding (hding2@illinois.edu) on 2011-05-07T15:02:30Z Item is restricted indefinitely.","Restriction data tranferred 2014-07-01T11:29:43-05:00 Original Data Group with Access UIUC Users [automated] Release Date: none Reason: ETDs are only available to UIUC Users without author permission","ETDs are only available to UIUC Users without author permission","U of I Only"]},{"key":"dc:title","label":"Title","values":["Statistical design of MOS VLSI circuits with designed experiments"]}]}],"canonical_facts":{"dc:contributor":["Kang, Sung Mo"],"dc:creator":["Yu, Tat Kwan Edgar"],"dc:date":["2011-05-07T14:03:52Z","10000-01-01","1989"],"dc:description":["Many methods for the statistical design and analysis of integrated circuits have been proposed over the past years. However, these methods typically require a large number of computationally expensive circuit simulator runs, and their applications are limited to small circuits.","This research investigated new approaches for the statistical design and analysis of MOS integrated circuits. This work has resulted in a new and efficient circuit performance modeling approach to statistical design. The proposed approach approximates the circuit performances, such as gain and delay, by fitted models of the inputs to the circuit simulator. The computationally inexpensive fitted models are then used as surrogates of the circuit simulator to predict and optimize the parametric yield and to achieve off-line quality control. The use of statistical design and analysis of experiments for model construction have been investigated theoretically and experimentally, and different methods to assess the adequacy of a fitted performance model have been studied.","Made available in DSpace on 2011-05-07T14:03:52Z (GMT). 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