{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/21879"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/21879","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Time-based strategies for semiconductor manufacture and test","abstract":"The world is a more competitive place than before, and time is a key component in any winning competitive strategy. This thesis provides methods by which companies can become more efficient time-based competitors in the semiconductor and computer businesses. Methods are presented in two very important areas, design and manufacture.","abstract_html":"The world is a more competitive place than before, and time is a key component in any winning competitive strategy. This thesis provides methods by which companies can become more efficient time-based competitors in the semiconductor and computer businesses. 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This thesis provides methods by which companies can become more efficient time-based competitors in the semiconductor and computer businesses. Methods are presented in two very important areas, design and manufacture.","In the design area, the issues of test and design-for-test are examined since they are important and growing parts of the total design cycle. A productivity study is presented and, from the insight gained, models are developed to accurately predict important issues in test and design-for-test. The productivity models are then combined with economic models to achieve a complete life cycle picture of the integrated circuit that not only includes die economics but also time-to-market effects and quality issues. Examples are presented to demonstrate the use of the models.","In the manufacturing end of the semiconductor business, a method is developed that allows just-in-time techniques to be applied to fabrication areas. The technique consists of unraveling the job shop by concentrating on the bottleneck and/or critical workstations and then calculating the number of Kanban cards needed to control inventory and production. An extensive simulation-based evaluation of the method is presented, comparing it to many other techniques for three types of fabrication areas. These are: single bottleneck with no hot-lots, multiple bottlenecks with no hot-lots, and single bottleneck with hot-lots. In all cases the just-in-time method developed performs best overall.","Made available in DSpace on 2011-05-07T13:21:58Z (GMT). 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This thesis provides methods by which companies can become more efficient time-based competitors in the semiconductor and computer businesses. Methods are presented in two very important areas, design and manufacture.","In the design area, the issues of test and design-for-test are examined since they are important and growing parts of the total design cycle. A productivity study is presented and, from the insight gained, models are developed to accurately predict important issues in test and design-for-test. The productivity models are then combined with economic models to achieve a complete life cycle picture of the integrated circuit that not only includes die economics but also time-to-market effects and quality issues. Examples are presented to demonstrate the use of the models.","In the manufacturing end of the semiconductor business, a method is developed that allows just-in-time techniques to be applied to fabrication areas. The technique consists of unraveling the job shop by concentrating on the bottleneck and/or critical workstations and then calculating the number of Kanban cards needed to control inventory and production. An extensive simulation-based evaluation of the method is presented, comparing it to many other techniques for three types of fabrication areas. These are: single bottleneck with no hot-lots, multiple bottlenecks with no hot-lots, and single bottleneck with hot-lots. In all cases the just-in-time method developed performs best overall.","Made available in DSpace on 2011-05-07T13:21:58Z (GMT). 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