{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/14727"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/14727","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"High-Speed Serial Data Link Design and Simulation","abstract":"This thesis describes the modeling and simulation of 10 Gb/s serial data link architectures. The first architecture uses a continuous-time receiver equalizer to equalize a channel with known frequency response. The second incorporates an adaptive decision feedback equalizer (DFE) for use in unknown or time-varying channels.","abstract_html":"This thesis describes the modeling and simulation of 10 Gb/s serial data link architectures. The first architecture uses a continuous-time receiver equalizer to equalize a channel with known frequency response. The second incorporates an adaptive decision feedback equalizer (DFE) for use in unknown or time-varying channels.","abstract_has_math":false,"creators":["Lee, Edward W."],"institution":"University of Illinois at Urbana-Champaign","degree_name":"M.S.","degree_level":"Thesis","degree_discipline":"Electrical and Computer Engineering","degree_department":null,"school":null,"contributors":["Schutt-Ainé, José E."],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2010,"date_issued":"2010-01-06T16:41:59Z","date_published":"2010-01-06T16:41:59Z","updated_at":"2026-07-22T22:25:08Z","subjects":["Serial Link Receiver","Data Recovery","Adaptive Equalization","Decision Feedback Equalizer","Decision Feedback Equalizer (DFE) Receiver"],"languages":["en"],"rights":["Copyright 2009 Edward W. Lee"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/2142/14727","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Schutt-Ainé, José E."]},{"key":"dc:creator","label":"Author","values":["Lee, Edward W."]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2010-01-06T16:41:59Z","2012-01-07T11:00:09Z","2009-12"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical and Computer Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Thesis"]},{"key":"thesis:degree_name","label":"Degree Name","values":["M.S."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Serial Link Receiver","Data Recovery","Adaptive Equalization","Decision Feedback Equalizer","Decision Feedback Equalizer (DFE) Receiver"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 2009 Edward W. Lee"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/14727"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["This thesis describes the modeling and simulation of 10 Gb/s serial data link architectures. The first architecture uses a continuous-time receiver equalizer to equalize a channel with known frequency response. The second incorporates an adaptive decision feedback equalizer (DFE) for use in unknown or time-varying channels.","Item withdrawn by Mark Zulauf (zulauf@illinois.edu) on 2009-12-02T15:21:28Z Item was in collections: University of Illinois Theses & Dissertations (ID: 1) No. of bitstreams: 2 Lee_Edward.pdf: 1332407 bytes, checksum: 76905f98e09ac3afa19da682fde6ec69 (MD5) Lee_Edward.pdf: 1332407 bytes, checksum: 76905f98e09ac3afa19da682fde6ec69 (MD5)","Made available in DSpace on 2010-01-06T16:41:59Z (GMT). No. of bitstreams: 3 license.txt: 4058 bytes, checksum: 972278872dad04e0f197d0a24a89a21d (MD5) Lee_Edward.pdf: 1332407 bytes, checksum: 76905f98e09ac3afa19da682fde6ec69 (MD5) 1_Lee_Edward.pdf: 1332407 bytes, checksum: 76905f98e09ac3afa19da682fde6ec69 (MD5)","Item marked as restricted to the 'UIUC Users [automated]' Group (id=2) by William Ingram (wingram2@illinois.edu) on 2010-01-06T16:42:22Z Item is restricted until 2012-01-06T16:42:19Z","Item reinstated by Sarah Shreeves (sshreeve@illinois.edu) on 2012-01-07T11:00:09Z Item was in collections: Dissertations and Theses - Electrical and Computer Engineering (ID: 446) University of Illinois Dissertations and Theses (ID: 204) No. of bitstreams: 4 1_Lee_Edward.pdf.txt: 34854 bytes, checksum: 2d6b50cd169eb17cc5df39a2d84a4dab (MD5) license.txt: 4058 bytes, checksum: 972278872dad04e0f197d0a24a89a21d (MD5) Lee_Edward.pdf: 1332407 bytes, checksum: 76905f98e09ac3afa19da682fde6ec69 (MD5) 1_Lee_Edward.pdf: 1332407 bytes, checksum: 76905f98e09ac3afa19da682fde6ec69 (MD5)","Item released from any restrictions by Sarah Shreeves (sshreeve@illinois.edu) on 2012-01-07T11:00:09Z"]},{"key":"dc:title","label":"Title","values":["High-Speed Serial Data Link Design and Simulation"]}]}],"canonical_facts":{"dc:contributor":["Schutt-Ainé, José E."],"dc:creator":["Lee, Edward W."],"dc:date":["2010-01-06T16:41:59Z","2012-01-07T11:00:09Z","2009-12"],"dc:description":["This thesis describes the modeling and simulation of 10 Gb/s serial data link architectures. The first architecture uses a continuous-time receiver equalizer to equalize a channel with known frequency response. The second incorporates an adaptive decision feedback equalizer (DFE) for use in unknown or time-varying channels.","Item withdrawn by Mark Zulauf (zulauf@illinois.edu) on 2009-12-02T15:21:28Z Item was in collections: University of Illinois Theses & Dissertations (ID: 1) No. of bitstreams: 2 Lee_Edward.pdf: 1332407 bytes, checksum: 76905f98e09ac3afa19da682fde6ec69 (MD5) Lee_Edward.pdf: 1332407 bytes, checksum: 76905f98e09ac3afa19da682fde6ec69 (MD5)","Made available in DSpace on 2010-01-06T16:41:59Z (GMT). No. of bitstreams: 3 license.txt: 4058 bytes, checksum: 972278872dad04e0f197d0a24a89a21d (MD5) Lee_Edward.pdf: 1332407 bytes, checksum: 76905f98e09ac3afa19da682fde6ec69 (MD5) 1_Lee_Edward.pdf: 1332407 bytes, checksum: 76905f98e09ac3afa19da682fde6ec69 (MD5)","Item marked as restricted to the 'UIUC Users [automated]' Group (id=2) by William Ingram (wingram2@illinois.edu) on 2010-01-06T16:42:22Z Item is restricted until 2012-01-06T16:42:19Z","Item reinstated by Sarah Shreeves (sshreeve@illinois.edu) on 2012-01-07T11:00:09Z Item was in collections: Dissertations and Theses - Electrical and Computer Engineering (ID: 446) University of Illinois Dissertations and Theses (ID: 204) No. of bitstreams: 4 1_Lee_Edward.pdf.txt: 34854 bytes, checksum: 2d6b50cd169eb17cc5df39a2d84a4dab (MD5) license.txt: 4058 bytes, checksum: 972278872dad04e0f197d0a24a89a21d (MD5) Lee_Edward.pdf: 1332407 bytes, checksum: 76905f98e09ac3afa19da682fde6ec69 (MD5) 1_Lee_Edward.pdf: 1332407 bytes, checksum: 76905f98e09ac3afa19da682fde6ec69 (MD5)","Item released from any restrictions by Sarah Shreeves (sshreeve@illinois.edu) on 2012-01-07T11:00:09Z"],"dc:identifier":["http://hdl.handle.net/2142/14727"],"dc:language":["en"],"dc:rights":["Copyright 2009 Edward W. Lee"],"dc:subject":["Serial Link Receiver","Data Recovery","Adaptive Equalization","Decision Feedback Equalizer","Decision Feedback Equalizer (DFE) Receiver"],"dc:title":["High-Speed Serial Data Link Design and Simulation"],"thesis:degree_discipline":["Electrical and Computer Engineering"],"thesis:degree_level":["Thesis"],"thesis:degree_name":["M.S."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:25:08Z"}