{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/129780"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/129780","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"High-swing PAM4 electrical transmitter with clock data recovery based timing error correction","abstract":"Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2027-05-01","abstract_html":"Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2027-05-01","abstract_has_math":false,"creators":["Shi, Ji"],"institution":"University of Illinois Urbana-Champaign","degree_name":"M.S.","degree_level":"Thesis","degree_discipline":"Electrical & Computer Engr","degree_department":null,"school":null,"contributors":["Hanumolu, Pavan Kumar"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2025,"date_issued":"2025-05-07","date_published":"2025-05-07","updated_at":"2026-07-22T22:25:05Z","subjects":["High Speed Wireline Ic","Clock Correction","Serdes"],"languages":["en","eng"],"rights":["Copyright 2025 Ji Shi"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"https://hdl.handle.net/2142/129780","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Hanumolu, Pavan Kumar"]},{"key":"dc:creator","label":"Author","values":["Shi, Ji"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2025-05-07","2025-05"]},{"key":"dc:type","label":"Dc Type","values":["text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical & Computer Engr"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Thesis"]},{"key":"thesis:degree_name","label":"Degree Name","values":["M.S."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["High Speed Wireline Ic","Clock Correction","Serdes"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en","eng"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 2025 Ji Shi"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["https://hdl.handle.net/2142/129780"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2027-05-01","The student, Ji Shi, accepted the attached license on 2025-05-06 at 17:01.","The student, Ji Shi, submitted this Thesis for approval on 2025-05-06 at 17:06.","This Thesis was approved for publication on 2025-05-07 at 14:02.","DSpace SAF Submission Ingestion Package generated from Vireo submission #22239 on 2025-10-19 at 19:55:45","This thesis presents a high-swing PAM4 transmitter with an integrated CDR based timing calibration architecture implemented in a 16nm CMOS process. The proposed transmitter achieves a differential output swing of 2VDD using standard core devices. A CDR-based timing calibration circuit is introduced that detects timing errors at the transmitter output, allowing correction of all timing non-idealities throughout the signal path. Simulation results demon strate improved eye quality after calibration for PAM4 signaling."]},{"key":"dc:format","label":"Dc Format","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["High-swing PAM4 electrical transmitter with clock data recovery based timing error correction"]}]}],"canonical_facts":{"dc:contributor":["Hanumolu, Pavan Kumar"],"dc:creator":["Shi, Ji"],"dc:date":["2025-05-07","2025-05"],"dc:description":["Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2027-05-01","The student, Ji Shi, accepted the attached license on 2025-05-06 at 17:01.","The student, Ji Shi, submitted this Thesis for approval on 2025-05-06 at 17:06.","This Thesis was approved for publication on 2025-05-07 at 14:02.","DSpace SAF Submission Ingestion Package generated from Vireo submission #22239 on 2025-10-19 at 19:55:45","This thesis presents a high-swing PAM4 transmitter with an integrated CDR based timing calibration architecture implemented in a 16nm CMOS process. The proposed transmitter achieves a differential output swing of 2VDD using standard core devices. A CDR-based timing calibration circuit is introduced that detects timing errors at the transmitter output, allowing correction of all timing non-idealities throughout the signal path. Simulation results demon strate improved eye quality after calibration for PAM4 signaling."],"dc:format":["application/pdf"],"dc:identifier":["https://hdl.handle.net/2142/129780"],"dc:language":["en","eng"],"dc:rights":["Copyright 2025 Ji Shi"],"dc:subject":["High Speed Wireline Ic","Clock Correction","Serdes"],"dc:title":["High-swing PAM4 electrical transmitter with clock data recovery based timing error correction"],"dc:type":["text"],"thesis:degree_discipline":["Electrical & Computer Engr"],"thesis:degree_level":["Thesis"],"thesis:degree_name":["M.S."],"thesis:institution_name":["University of Illinois Urbana-Champaign"]},"updated_at":"2026-07-22T22:25:05Z"}