{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/115575"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/115575","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Nimblock: scheduling for fine-grained FPGA sharing through virtualization","abstract":"Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2024-05-01","abstract_html":"Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2024-05-01","abstract_has_math":false,"creators":["Reckamp, Paul"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"M.S.","degree_level":"Thesis","degree_discipline":"Electrical & Computer Engr","degree_department":null,"school":null,"contributors":["Chen, Deming"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2022,"date_issued":"2022-05","date_published":"2022-05","updated_at":"2026-07-22T22:24:54Z","subjects":["FPGA","Virtualization","Scheduling"],"languages":["en","eng"],"rights":["Copyright 2022 Paul Reckamp"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"https://hdl.handle.net/2142/115575","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Chen, Deming"]},{"key":"dc:creator","label":"Author","values":["Reckamp, Paul"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2022-05","2022-04-25"]},{"key":"dc:type","label":"Dc Type","values":["text","Thesis"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical & Computer Engr"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Thesis"]},{"key":"thesis:degree_name","label":"Degree Name","values":["M.S."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["FPGA","Virtualization","Scheduling"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en","eng"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 2022 Paul Reckamp"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["https://hdl.handle.net/2142/115575"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2024-05-01","The student, Paul Reckamp, accepted the attached license on 2022-04-18 at 17:42.","The student, Paul Reckamp, submitted this Thesis for approval on 2022-04-18 at 17:51.","This Thesis was approved for publication on 2022-04-25 at 11:48.","DSpace SAF Submission Ingestion Package generated from Vireo submission #17767 on 2022-11-11 at 12:06:07","As FPGAs become ubiquitous compute platforms, existing research has focused on enabling virtualization features to facilitate fine-grained FPGA sharing. We employ an overlay architecture which enables arbitrary, independent user logic to share portions of a single FPGA by dividing the FPGA into independently reconfigurable slots. We then explore scheduling possibilities to effectively time-multiplex and space-multiplex the virtualized FPGA by introducing Nimblock. The Nimblock scheduling algorithm balances application priorities and performance degradation to improve response time and reduce deadline violations. Unlike other algorithms, Nimblock explores preemption as a scheduling parameter to dynamically change resource allocations. In our exploration, we evaluate five scheduling algorithms: a baseline, three existing algorithms, and our novel Nimblock algorithm. We demonstrate system feasibility by realizing the complete system on a Xilinx ZCU106 FPGA and evaluating on a set of real-world benchmarks. In our results, we achieve up to 9× lower median response times when compared to the baseline scheduling algorithms. We additionally demonstrate up to 21% fewer deadline violations and up to 2.1× lower tail response times when compared to other high-performance algorithms."]},{"key":"dc:format","label":"Dc Format","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Nimblock: scheduling for fine-grained FPGA sharing through virtualization"]}]}],"canonical_facts":{"dc:contributor":["Chen, Deming"],"dc:creator":["Reckamp, Paul"],"dc:date":["2022-05","2022-04-25"],"dc:description":["Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2024-05-01","The student, Paul Reckamp, accepted the attached license on 2022-04-18 at 17:42.","The student, Paul Reckamp, submitted this Thesis for approval on 2022-04-18 at 17:51.","This Thesis was approved for publication on 2022-04-25 at 11:48.","DSpace SAF Submission Ingestion Package generated from Vireo submission #17767 on 2022-11-11 at 12:06:07","As FPGAs become ubiquitous compute platforms, existing research has focused on enabling virtualization features to facilitate fine-grained FPGA sharing. We employ an overlay architecture which enables arbitrary, independent user logic to share portions of a single FPGA by dividing the FPGA into independently reconfigurable slots. We then explore scheduling possibilities to effectively time-multiplex and space-multiplex the virtualized FPGA by introducing Nimblock. The Nimblock scheduling algorithm balances application priorities and performance degradation to improve response time and reduce deadline violations. Unlike other algorithms, Nimblock explores preemption as a scheduling parameter to dynamically change resource allocations. In our exploration, we evaluate five scheduling algorithms: a baseline, three existing algorithms, and our novel Nimblock algorithm. We demonstrate system feasibility by realizing the complete system on a Xilinx ZCU106 FPGA and evaluating on a set of real-world benchmarks. In our results, we achieve up to 9× lower median response times when compared to the baseline scheduling algorithms. We additionally demonstrate up to 21% fewer deadline violations and up to 2.1× lower tail response times when compared to other high-performance algorithms."],"dc:format":["application/pdf"],"dc:identifier":["https://hdl.handle.net/2142/115575"],"dc:language":["en","eng"],"dc:rights":["Copyright 2022 Paul Reckamp"],"dc:subject":["FPGA","Virtualization","Scheduling"],"dc:title":["Nimblock: scheduling for fine-grained FPGA sharing through virtualization"],"dc:type":["text","Thesis"],"thesis:degree_discipline":["Electrical & Computer Engr"],"thesis:degree_level":["Thesis"],"thesis:degree_name":["M.S."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:24:54Z"}