{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/114068"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/114068","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Techniques for integrated energy-efficient power conversion","abstract":"Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2023-12-01","abstract_html":"Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2023-12-01","abstract_has_math":false,"creators":["Pal, Nilanjan"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"Ph.D.","degree_level":"Dissertation","degree_discipline":"Electrical & Computer Engr","degree_department":null,"school":null,"contributors":["Hanumolu, Pavan Kumar","Pilawa-Podgurski, Robert","Banerjee, Arijit","Zhou, Jin","Schutt-Aine, Jose"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2022,"date_issued":"2022-04-29T21:58:24Z","date_published":"2022-04-29T21:58:24Z","updated_at":"2026-07-22T22:24:54Z","subjects":["Engineering"],"languages":["en","eng"],"rights":["Copyright 2021 Nilanjan Pal"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/2142/114068","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Hanumolu, Pavan Kumar","Pilawa-Podgurski, Robert","Banerjee, Arijit","Zhou, Jin","Schutt-Aine, Jose"]},{"key":"dc:creator","label":"Author","values":["Pal, Nilanjan"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2022-04-29T21:58:24Z","2024-04-29T21:58:46Z","2021-12","2021-11-22"]},{"key":"dc:type","label":"Dc Type","values":["text","Thesis"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical & Computer Engr"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Dissertation"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph.D."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Engineering"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en","eng"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 2021 Nilanjan Pal"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/114068"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2023-12-01","The student, Nilanjan Pal, accepted the attached license on 2021-11-18 at 14:12.","The student, Nilanjan Pal, submitted this Dissertation for approval on 2021-11-18 at 14:35.","This Dissertation was approved for publication on 2021-11-22 at 09:25.","DSpace SAF Submission Ingestion Package generated from Vireo submission #17226 on 2022-04-29 at 16:09:47","Made available in DSpace on 2022-04-29T21:58:24Z (GMT). No. of bitstreams: 3 PAL-DISSERTATION-2021.pdf: 13042580 bytes, checksum: 4145d5197705c473d02df548acf6d8b4 (MD5) LICENSE.txt: 4209 bytes, checksum: 7a79a486c1a6ecf22784e1f77b73f8bb (MD5) PROQUEST_LICENSE.txt: 4555 bytes, checksum: f83a9fc9daa7c049d274662ab3e0c129 (MD5) Previous issue date: 2021-11-22","Embargo set by: Seth Robbins for item 123433 Lift date: 2024-04-29T21:58:46Z Reason: Author requested closed access (OA after 2yrs) in Vireo ETD system","Author requested closed access (OA after 2yrs) in Vireo ETD system","Limited","Power converters are a fundamental part of any system that seek to transfer electrical energy from one voltage domain to another. Traditionally, the power converter required bulky off-chip power switches to maintain acceptable efficiency which resulted in them occupying a significant portion of the total system volume. As these systems evolved to reduce in volume the corresponding power converters needed to adapt by improving both power density and efficiency. This eventually led to the integration of power switches along with the control circuitry on a single die. This integration presented unique opportunities and challenges from a power converter perspective which has resulted in a renewed focus on integrated power converters. The various DC-DC power converter topologies can be broadly categorised into two classes: switched-inductor and switched-capacitor types. Generally, the switched-inductor type is more suitable for power levels of the order of a few watts or higher, while the switched-capacitor type is more suited to low-power applications of a few hundred milli-watts. Recently, a third category has emerged: hybrid converters which tries to combine the advantages of both the aforementioned categories. The relatively new type of power converter primarily aims to improve power efficiency by easing the trade-off between switching and conduction loss by enabling the use of better power switches. In the first technique, a hybrid boost converter architecture for improving the efficiency of LED drivers used in mobile applications, is presented. By cascading a low-switching frequency time-interleaved series-parallel SC-stage with an inductive boost converter, we facilitate lower voltage-rated switches, thus significantly reducing the switching losses. Charge-sharing losses of the SC stage are minimized by soft-charging flying capacitors with the inductor of the boost stage. Fabricated in 180 nm BCD process, the prototype converter generates 30 V output voltage from a Lithium-ion (Li-ion) battery source. It can provide a load current in the range of 0 to 100 mA with an excellent peak power efficiency of 91.15% at 30 mA, which represents a 3% improvement over the state-of-the-art. In the second technique, a novel current sensing architecture is explored. A new duty-cycle sensing technique with applications in current sensing for DC-DC power converters is presented. A time-based Delta-Sigma ADC with 1-bit delay-DAC accurately measures small changes in the duty-cycle of a PWM waveform. Fabricated in 65 nm general purpose CMOS process, the prototype senses changes in duty-cycle ranging from 4 m up to 20 m with 1% linearity, making it suitable for detecting small load current-dependent changes in the duty-cycle of a regulated DC-DC power converter. The switching clock of a power converter is an important part of the whole system. It is essential to keep the frequency of this clock fixed under various operating conditions in order to prevent the generation of unwanted harmonics which might interfere with the proper functioning of the whole system. For most low-frequency integrated power converters, an on-chip relaxation oscillator is used. Even though this oscillator architecture is very power efficient, it has large variation in frequency over temperature. A method for improving the temperature stability of RC relaxation oscillators by precisely interpolating between resistors with opposing temperature coefficients is presented. By obviating the need for a large trimming network of switches and resistors, it achieves excellent frequency accuracy across PVT. Fabricated in 65 nm CMOS, the prototype 400 kHz oscillator achieves an inaccuracy of 16 ppm/degC (-40degC to 85degC), 2.5 ppm/mV voltage sensitivity, and 5.6 ppm Allan deviation in one second strides."]},{"key":"dc:format","label":"Dc Format","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Techniques for integrated energy-efficient power conversion"]}]}],"canonical_facts":{"dc:contributor":["Hanumolu, Pavan Kumar","Pilawa-Podgurski, Robert","Banerjee, Arijit","Zhou, Jin","Schutt-Aine, Jose"],"dc:creator":["Pal, Nilanjan"],"dc:date":["2022-04-29T21:58:24Z","2024-04-29T21:58:46Z","2021-12","2021-11-22"],"dc:description":["Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2023-12-01","The student, Nilanjan Pal, accepted the attached license on 2021-11-18 at 14:12.","The student, Nilanjan Pal, submitted this Dissertation for approval on 2021-11-18 at 14:35.","This Dissertation was approved for publication on 2021-11-22 at 09:25.","DSpace SAF Submission Ingestion Package generated from Vireo submission #17226 on 2022-04-29 at 16:09:47","Made available in DSpace on 2022-04-29T21:58:24Z (GMT). No. of bitstreams: 3 PAL-DISSERTATION-2021.pdf: 13042580 bytes, checksum: 4145d5197705c473d02df548acf6d8b4 (MD5) LICENSE.txt: 4209 bytes, checksum: 7a79a486c1a6ecf22784e1f77b73f8bb (MD5) PROQUEST_LICENSE.txt: 4555 bytes, checksum: f83a9fc9daa7c049d274662ab3e0c129 (MD5) Previous issue date: 2021-11-22","Embargo set by: Seth Robbins for item 123433 Lift date: 2024-04-29T21:58:46Z Reason: Author requested closed access (OA after 2yrs) in Vireo ETD system","Author requested closed access (OA after 2yrs) in Vireo ETD system","Limited","Power converters are a fundamental part of any system that seek to transfer electrical energy from one voltage domain to another. Traditionally, the power converter required bulky off-chip power switches to maintain acceptable efficiency which resulted in them occupying a significant portion of the total system volume. As these systems evolved to reduce in volume the corresponding power converters needed to adapt by improving both power density and efficiency. This eventually led to the integration of power switches along with the control circuitry on a single die. This integration presented unique opportunities and challenges from a power converter perspective which has resulted in a renewed focus on integrated power converters. The various DC-DC power converter topologies can be broadly categorised into two classes: switched-inductor and switched-capacitor types. Generally, the switched-inductor type is more suitable for power levels of the order of a few watts or higher, while the switched-capacitor type is more suited to low-power applications of a few hundred milli-watts. Recently, a third category has emerged: hybrid converters which tries to combine the advantages of both the aforementioned categories. The relatively new type of power converter primarily aims to improve power efficiency by easing the trade-off between switching and conduction loss by enabling the use of better power switches. In the first technique, a hybrid boost converter architecture for improving the efficiency of LED drivers used in mobile applications, is presented. By cascading a low-switching frequency time-interleaved series-parallel SC-stage with an inductive boost converter, we facilitate lower voltage-rated switches, thus significantly reducing the switching losses. Charge-sharing losses of the SC stage are minimized by soft-charging flying capacitors with the inductor of the boost stage. Fabricated in 180 nm BCD process, the prototype converter generates 30 V output voltage from a Lithium-ion (Li-ion) battery source. It can provide a load current in the range of 0 to 100 mA with an excellent peak power efficiency of 91.15% at 30 mA, which represents a 3% improvement over the state-of-the-art. In the second technique, a novel current sensing architecture is explored. A new duty-cycle sensing technique with applications in current sensing for DC-DC power converters is presented. A time-based Delta-Sigma ADC with 1-bit delay-DAC accurately measures small changes in the duty-cycle of a PWM waveform. Fabricated in 65 nm general purpose CMOS process, the prototype senses changes in duty-cycle ranging from 4 m up to 20 m with 1% linearity, making it suitable for detecting small load current-dependent changes in the duty-cycle of a regulated DC-DC power converter. The switching clock of a power converter is an important part of the whole system. It is essential to keep the frequency of this clock fixed under various operating conditions in order to prevent the generation of unwanted harmonics which might interfere with the proper functioning of the whole system. For most low-frequency integrated power converters, an on-chip relaxation oscillator is used. Even though this oscillator architecture is very power efficient, it has large variation in frequency over temperature. A method for improving the temperature stability of RC relaxation oscillators by precisely interpolating between resistors with opposing temperature coefficients is presented. By obviating the need for a large trimming network of switches and resistors, it achieves excellent frequency accuracy across PVT. Fabricated in 65 nm CMOS, the prototype 400 kHz oscillator achieves an inaccuracy of 16 ppm/degC (-40degC to 85degC), 2.5 ppm/mV voltage sensitivity, and 5.6 ppm Allan deviation in one second strides."],"dc:format":["application/pdf"],"dc:identifier":["http://hdl.handle.net/2142/114068"],"dc:language":["en","eng"],"dc:rights":["Copyright 2021 Nilanjan Pal"],"dc:subject":["Engineering"],"dc:title":["Techniques for integrated energy-efficient power conversion"],"dc:type":["text","Thesis"],"thesis:degree_discipline":["Electrical & Computer Engr"],"thesis:degree_level":["Dissertation"],"thesis:degree_name":["Ph.D."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:24:54Z"}