{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/113200"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/113200","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Machine learning based models for signal integrity analysis","abstract":"Made available in DSpace on 2022-01-12T22:35:16Z (GMT). No. of bitstreams: 3 NGUYEN-DISSERTATION-2021.pdf: 24692877 bytes, checksum: 26f8ad8bdafbb48958bc3f2682a3dd51 (MD5) LICENSE.txt: 4209 bytes, checksum: 548a765547e3e0ab8829c91d9ea90bc4 (MD5) PROQUEST_LICENSE.txt: 4555 bytes, checksum: 452a4b32aa302cf7c46a9c6bf8f5f3ba (MD5) Previous issue date: 2021-07-15","abstract_html":"Made available in DSpace on 2022-01-12T22:35:16Z (GMT). No. of bitstreams: 3 NGUYEN-DISSERTATION-2021.pdf: 24692877 bytes, checksum: 26f8ad8bdafbb48958bc3f2682a3dd51 (MD5) LICENSE.txt: 4209 bytes, checksum: 548a765547e3e0ab8829c91d9ea90bc4 (MD5) PROQUEST_LICENSE.txt: 4555 bytes, checksum: 452a4b32aa302cf7c46a9c6bf8f5f3ba (MD5) Previous issue date: 2021-07-15","abstract_has_math":false,"creators":["Nguyen, Thong Nhu"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"Ph.D.","degree_level":"Dissertation","degree_discipline":"Electrical & Computer Engr","degree_department":null,"school":null,"contributors":["Schutt-Aine, Jose","Bernhard, Jennifer","Cangellaris, Andreas","Kudeki, Erhan"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2022,"date_issued":"2022-01-12T22:35:16Z","date_published":"2022-01-12T22:35:16Z","updated_at":"2026-07-22T22:24:53Z","subjects":["Machine learning, EDA, simulation, system verification, system integration, Gaussian Process, full Bayesian treatment, recurrent neural network, feed-forward neural network, parameterized nonlinear macromodeling, surrogate modeling, IBIS, nonlinear I/O buffers, high-speed link, high-speed channel, eye diagram, Volterra-Laguerre, Volterra kernels, superconvolution, weakly nonlinear circuits."],"languages":["en"],"rights":["Copyright 2021 Thong Nguyen"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/2142/113200","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Schutt-Aine, Jose","Bernhard, Jennifer","Cangellaris, Andreas","Kudeki, Erhan"]},{"key":"dc:creator","label":"Author","values":["Nguyen, Thong Nhu"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2022-01-12T22:35:16Z","2024-01-12T22:35:30Z","2021-07-15","2021-08"]},{"key":"dc:type","label":"Dc Type","values":["text","Thesis"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical & Computer Engr"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Dissertation"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph.D."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Machine learning, EDA, simulation, system verification, system integration, Gaussian Process, full Bayesian treatment, recurrent neural network, feed-forward neural network, parameterized nonlinear macromodeling, surrogate modeling, IBIS, nonlinear I/O buffers, high-speed link, high-speed channel, eye diagram, Volterra-Laguerre, Volterra kernels, superconvolution, weakly nonlinear circuits."]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 2021 Thong Nguyen"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/113200"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Made available in DSpace on 2022-01-12T22:35:16Z (GMT). No. of bitstreams: 3 NGUYEN-DISSERTATION-2021.pdf: 24692877 bytes, checksum: 26f8ad8bdafbb48958bc3f2682a3dd51 (MD5) LICENSE.txt: 4209 bytes, checksum: 548a765547e3e0ab8829c91d9ea90bc4 (MD5) PROQUEST_LICENSE.txt: 4555 bytes, checksum: 452a4b32aa302cf7c46a9c6bf8f5f3ba (MD5) Previous issue date: 2021-07-15","Embargo set by: Seth Robbins for item 121126 Lift date: 2024-01-12T22:35:30Z Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system","With a short product cycle as we see today, fast and accurate modeling methods are becoming crucial for the development of new generations of electronic devices. Furthermore, increased complexity in circuitry and integration compounds design iteration and the associated, high-dimensional sensitivity analysis and performance optimization studies. Expedient design iteration, performance optimization, and design verification of state-of-the-art electronic devices and systems are hindered by the ever-increasing functionality integration. This thesis is meant to contribute a small part to the enormous amount of effort of the electronic design automation community in the quest for computationally efficient methods capable of handling the high-dimensional design space of such devices and systems using machine learning methods. This thesis focuses on applications related to high-speed channel and microwave circuit designs. It first explores the recurrent neural network for time-domain waveform prediction. Two different recurrent neural network architectures are distinguished, their advantages and disadvantages are pointed out. Different examples are used to demonstrate how each can be used to create macromodels of high-speed channel, speeding up signal integrity simulations. When combining with a feed-forward neural network, the recurrent neural network can be used as a parametrized model, creating a tunable equalization circuit. In the weakly nonlinear system regime, Volterra representation is widely acceptable due to its familiarity and analogy to time-invariant linear system theory. Similar to IBIS in the data collection, but require less training data compared to recurrent neural network or even IBIS, Volterra-Laguerre theory is shown to be very effective in modeling I/O buffers. On top of that, using a simple multidimensional interpolant, a parametrized model can be created and verified to match very well with transistor level circuit simulations. At the final stage of the design verification process, a system level integration and assessment is needed. Simulations of such complicated systems involve many tools at different levels of physics (die, package, board). At the end of the day, the ultimate goal is to judge whether the integration works using a handful number of figure of merit. Therefore, a surrogate model whose inputs are the design variables and outputs are the figure of merit is needed to replace expensive and lengthy simulation. For example, in high-speed link design, a model that receives the channel’s geometry and equalization settings and return the eye width and eye height would be highly appreciated by the designer as it would dramatically reduce the verification time and make optimizations become convenient. The last part of this work introduces Gaussian Process for this purpose. Through its full Bayesian treatment, the Gaussian Process appears to be an excellent candidate for a black-box surrogate modeling method due to its data efficiency and fast convergence. Other machine learning methods are also considered in a comparative study in which Gaussian Process performs consistently well as expected.","Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2023-08-01","The student, Thong Nguyen, accepted the attached license on 2021-07-14 at 17:49.","The student, Thong Nguyen, submitted this Dissertation for approval on 2021-07-14 at 18:03.","This Dissertation was approved for publication on 2021-07-15 at 16:42.","DSpace SAF Submission Ingestion Package generated from Vireo submission #16944 on 2022-01-12 at 12:55:11","Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system","U of I Only"]},{"key":"dc:format","label":"Dc Format","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Machine learning based models for signal integrity analysis"]}]}],"canonical_facts":{"dc:contributor":["Schutt-Aine, Jose","Bernhard, Jennifer","Cangellaris, Andreas","Kudeki, Erhan"],"dc:creator":["Nguyen, Thong Nhu"],"dc:date":["2022-01-12T22:35:16Z","2024-01-12T22:35:30Z","2021-07-15","2021-08"],"dc:description":["Made available in DSpace on 2022-01-12T22:35:16Z (GMT). No. of bitstreams: 3 NGUYEN-DISSERTATION-2021.pdf: 24692877 bytes, checksum: 26f8ad8bdafbb48958bc3f2682a3dd51 (MD5) LICENSE.txt: 4209 bytes, checksum: 548a765547e3e0ab8829c91d9ea90bc4 (MD5) PROQUEST_LICENSE.txt: 4555 bytes, checksum: 452a4b32aa302cf7c46a9c6bf8f5f3ba (MD5) Previous issue date: 2021-07-15","Embargo set by: Seth Robbins for item 121126 Lift date: 2024-01-12T22:35:30Z Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system","With a short product cycle as we see today, fast and accurate modeling methods are becoming crucial for the development of new generations of electronic devices. Furthermore, increased complexity in circuitry and integration compounds design iteration and the associated, high-dimensional sensitivity analysis and performance optimization studies. Expedient design iteration, performance optimization, and design verification of state-of-the-art electronic devices and systems are hindered by the ever-increasing functionality integration. This thesis is meant to contribute a small part to the enormous amount of effort of the electronic design automation community in the quest for computationally efficient methods capable of handling the high-dimensional design space of such devices and systems using machine learning methods. This thesis focuses on applications related to high-speed channel and microwave circuit designs. It first explores the recurrent neural network for time-domain waveform prediction. Two different recurrent neural network architectures are distinguished, their advantages and disadvantages are pointed out. Different examples are used to demonstrate how each can be used to create macromodels of high-speed channel, speeding up signal integrity simulations. When combining with a feed-forward neural network, the recurrent neural network can be used as a parametrized model, creating a tunable equalization circuit. In the weakly nonlinear system regime, Volterra representation is widely acceptable due to its familiarity and analogy to time-invariant linear system theory. Similar to IBIS in the data collection, but require less training data compared to recurrent neural network or even IBIS, Volterra-Laguerre theory is shown to be very effective in modeling I/O buffers. On top of that, using a simple multidimensional interpolant, a parametrized model can be created and verified to match very well with transistor level circuit simulations. At the final stage of the design verification process, a system level integration and assessment is needed. Simulations of such complicated systems involve many tools at different levels of physics (die, package, board). At the end of the day, the ultimate goal is to judge whether the integration works using a handful number of figure of merit. Therefore, a surrogate model whose inputs are the design variables and outputs are the figure of merit is needed to replace expensive and lengthy simulation. For example, in high-speed link design, a model that receives the channel’s geometry and equalization settings and return the eye width and eye height would be highly appreciated by the designer as it would dramatically reduce the verification time and make optimizations become convenient. The last part of this work introduces Gaussian Process for this purpose. Through its full Bayesian treatment, the Gaussian Process appears to be an excellent candidate for a black-box surrogate modeling method due to its data efficiency and fast convergence. Other machine learning methods are also considered in a comparative study in which Gaussian Process performs consistently well as expected.","Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2023-08-01","The student, Thong Nguyen, accepted the attached license on 2021-07-14 at 17:49.","The student, Thong Nguyen, submitted this Dissertation for approval on 2021-07-14 at 18:03.","This Dissertation was approved for publication on 2021-07-15 at 16:42.","DSpace SAF Submission Ingestion Package generated from Vireo submission #16944 on 2022-01-12 at 12:55:11","Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system","U of I Only"],"dc:format":["application/pdf"],"dc:identifier":["http://hdl.handle.net/2142/113200"],"dc:language":["en"],"dc:rights":["Copyright 2021 Thong Nguyen"],"dc:subject":["Machine learning, EDA, simulation, system verification, system integration, Gaussian Process, full Bayesian treatment, recurrent neural network, feed-forward neural network, parameterized nonlinear macromodeling, surrogate modeling, IBIS, nonlinear I/O buffers, high-speed link, high-speed channel, eye diagram, Volterra-Laguerre, Volterra kernels, superconvolution, weakly nonlinear circuits."],"dc:title":["Machine learning based models for signal integrity analysis"],"dc:type":["text","Thesis"],"thesis:degree_discipline":["Electrical & Computer Engr"],"thesis:degree_level":["Dissertation"],"thesis:degree_name":["Ph.D."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:24:53Z"}