{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/108134"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/108134","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Ring oscillators for high performance clock synthesis and sensor interfaces","abstract":"Thanks to their small area and multiphase output, ring oscillators (ROs) play important roles in many systems. In this thesis, we study, analyze and propose novel solutions for RO-based applications. We cover three applications for ROs, namely, wireline clock generation, temperature-compensated references, and sensor interfaces. We start by focusing on RO-based clock generation where the phase noise is degraded due to jitter accumulation. We present a synthesizer architecture that uses a low-noise passive multiphase generator which does not suffer from jitter accumulation and digital background calibration to correct for errors in the multiphase generator. The synthesizer uses a standard 54MHz crystal to synthesize a 245fsrms 5GHz output while consuming only 8.2mW. For the frequency reference part, we propose a novel temperature-compensated oscillator (TCO) using a RO locked to RC reference using a frequency locked loop (FLL). High-resolution generated sequences are used to clock switched resistors of opposite temperature coefficients which serve as a reference resistor for the FLL. This results in excellent temperature coefficient of 8.4ppm/◦C from −40◦C to 85◦C while relying on only 2-point trim operation. The TCO also achieves a supply sensitivity of 80ppm/V and power efficiency of 1μW/MHz. For using the RO as a sensor interface, we propose a RO-based temperature sensor where the output period of the RO is locked to an RC sensor using a FLL. We propose a voltage mode FLL structure which guarantees very small area and low noise thanks to a novel 3-phase frequency-to-voltage converter which eliminates charge pump noise. The quantization noise is rejected by passing the 10 phases of the RO to an edge combiner. This allows building a compact temperature sensor occupying 8800μm2 area and achieving ±0.5◦C peak to peak inaccuracy after 1-point trim and 92fJ·K2 resolution FoM.","abstract_html":"Thanks to their small area and multiphase output, ring oscillators (ROs) play important roles in many systems. In this thesis, we study, analyze and propose novel solutions for RO-based applications. We cover three applications for ROs, namely, wireline clock generation, temperature-compensated references, and sensor interfaces. We start by focusing on RO-based clock generation where the phase noise is degraded due to jitter accumulation. We present a synthesizer architecture that uses a low-noise passive multiphase generator which does not suffer from jitter accumulation and digital background calibration to correct for errors in the multiphase generator. The synthesizer uses a standard 54MHz crystal to synthesize a 245fsrms 5GHz output while consuming only 8.2mW. For the frequency reference part, we propose a novel temperature-compensated oscillator (TCO) using a RO locked to RC reference using a frequency locked loop (FLL). High-resolution generated sequences are used to clock switched resistors of opposite temperature coefficients which serve as a reference resistor for the FLL. This results in excellent temperature coefficient of 8.4ppm/◦C from −40◦C to 85◦C while relying on only 2-point trim operation. The TCO also achieves a supply sensitivity of 80ppm/V and power efficiency of 1μW/MHz. For using the RO as a sensor interface, we propose a RO-based temperature sensor where the output period of the RO is locked to an RC sensor using a FLL. We propose a voltage mode FLL structure which guarantees very small area and low noise thanks to a novel 3-phase frequency-to-voltage converter which eliminates charge pump noise. The quantization noise is rejected by passing the 10 phases of the RO to an edge combiner. This allows building a compact temperature sensor occupying 8800μm2 area and achieving ±0.5◦C peak to peak inaccuracy after 1-point trim and 92fJ·K2 resolution FoM.","abstract_has_math":false,"creators":["Khashaba, Amr Tarek Ahmed Abdelrazik"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"Ph.D.","degree_level":"Dissertation","degree_discipline":"Electrical & Computer Engr","degree_department":null,"school":null,"contributors":["Hanumolu, Pavan Kumar","Shanbhag, Naresh","Schutt-Aine, Jose","Zhou, Jin"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2020,"date_issued":"2020-08-26T23:57:20Z","date_published":"2020-08-26T23:57:20Z","updated_at":"2026-07-22T22:24:47Z","subjects":["Ring oscillator, multiphase generation, PLL, FLL, temperature sensor, temperature compensated oscillator"],"languages":["en"],"rights":["Copyright 2020 Amr Khashaba"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/2142/108134","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Hanumolu, Pavan Kumar","Shanbhag, Naresh","Schutt-Aine, Jose","Zhou, Jin"]},{"key":"dc:creator","label":"Author","values":["Khashaba, Amr Tarek Ahmed Abdelrazik"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2020-08-26T23:57:20Z","2022-08-26T23:58:55Z","2020-04-29","2020-05"]},{"key":"dc:type","label":"Dc Type","values":["text","Thesis"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical & Computer Engr"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Dissertation"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Ph.D."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Ring oscillator, multiphase generation, PLL, FLL, temperature sensor, temperature compensated oscillator"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 2020 Amr Khashaba"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/108134"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Thanks to their small area and multiphase output, ring oscillators (ROs) play important roles in many systems. In this thesis, we study, analyze and propose novel solutions for RO-based applications. We cover three applications for ROs, namely, wireline clock generation, temperature-compensated references, and sensor interfaces. We start by focusing on RO-based clock generation where the phase noise is degraded due to jitter accumulation. We present a synthesizer architecture that uses a low-noise passive multiphase generator which does not suffer from jitter accumulation and digital background calibration to correct for errors in the multiphase generator. The synthesizer uses a standard 54MHz crystal to synthesize a 245fsrms 5GHz output while consuming only 8.2mW. For the frequency reference part, we propose a novel temperature-compensated oscillator (TCO) using a RO locked to RC reference using a frequency locked loop (FLL). High-resolution generated sequences are used to clock switched resistors of opposite temperature coefficients which serve as a reference resistor for the FLL. This results in excellent temperature coefficient of 8.4ppm/◦C from −40◦C to 85◦C while relying on only 2-point trim operation. The TCO also achieves a supply sensitivity of 80ppm/V and power efficiency of 1μW/MHz. For using the RO as a sensor interface, we propose a RO-based temperature sensor where the output period of the RO is locked to an RC sensor using a FLL. We propose a voltage mode FLL structure which guarantees very small area and low noise thanks to a novel 3-phase frequency-to-voltage converter which eliminates charge pump noise. The quantization noise is rejected by passing the 10 phases of the RO to an edge combiner. This allows building a compact temperature sensor occupying 8800μm2 area and achieving ±0.5◦C peak to peak inaccuracy after 1-point trim and 92fJ·K2 resolution FoM.","Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2022-05-01","The student, Amr Khashaba, accepted the attached license on 2020-04-29 at 10:31.","The student, Amr Khashaba, submitted this Dissertation for approval on 2020-04-29 at 10:40.","This Dissertation was approved for publication on 2020-04-29 at 14:27.","DSpace SAF Submission Ingestion Package generated from Vireo submission #15111 on 2020-08-25 at 17:28:28","Made available in DSpace on 2020-08-26T23:57:20Z (GMT). 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In this thesis, we study, analyze and propose novel solutions for RO-based applications. We cover three applications for ROs, namely, wireline clock generation, temperature-compensated references, and sensor interfaces. We start by focusing on RO-based clock generation where the phase noise is degraded due to jitter accumulation. We present a synthesizer architecture that uses a low-noise passive multiphase generator which does not suffer from jitter accumulation and digital background calibration to correct for errors in the multiphase generator. The synthesizer uses a standard 54MHz crystal to synthesize a 245fsrms 5GHz output while consuming only 8.2mW. For the frequency reference part, we propose a novel temperature-compensated oscillator (TCO) using a RO locked to RC reference using a frequency locked loop (FLL). High-resolution generated sequences are used to clock switched resistors of opposite temperature coefficients which serve as a reference resistor for the FLL. This results in excellent temperature coefficient of 8.4ppm/◦C from −40◦C to 85◦C while relying on only 2-point trim operation. The TCO also achieves a supply sensitivity of 80ppm/V and power efficiency of 1μW/MHz. For using the RO as a sensor interface, we propose a RO-based temperature sensor where the output period of the RO is locked to an RC sensor using a FLL. We propose a voltage mode FLL structure which guarantees very small area and low noise thanks to a novel 3-phase frequency-to-voltage converter which eliminates charge pump noise. The quantization noise is rejected by passing the 10 phases of the RO to an edge combiner. This allows building a compact temperature sensor occupying 8800μm2 area and achieving ±0.5◦C peak to peak inaccuracy after 1-point trim and 92fJ·K2 resolution FoM.","Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2022-05-01","The student, Amr Khashaba, accepted the attached license on 2020-04-29 at 10:31.","The student, Amr Khashaba, submitted this Dissertation for approval on 2020-04-29 at 10:40.","This Dissertation was approved for publication on 2020-04-29 at 14:27.","DSpace SAF Submission Ingestion Package generated from Vireo submission #15111 on 2020-08-25 at 17:28:28","Made available in DSpace on 2020-08-26T23:57:20Z (GMT). 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