{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/108075"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/108075","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Modeling of a buck converter with fast load transient auxiliary circuit for CPUs","abstract":"In a buck converter, the output capacitance is the dominant factor that determines the magnitude of overshoot/undershoot in the supply voltage during a load transient. In applications such as powering a CPU, the CPU can make computational predictions for its future supply current levels which can be used to inform the power converter of future load transients. With information about future load transients, an auxiliary circuit can be used to deliver the needed energy to the load at the time of the informed load transient. With a communication scheme between the CPU and power supply, the power supply load transient response can be optimized allowing for a reduction in the total output capacitance, board space, and cost.","abstract_html":"In a buck converter, the output capacitance is the dominant factor that determines the magnitude of overshoot/undershoot in the supply voltage during a load transient. In applications such as powering a CPU, the CPU can make computational predictions for its future supply current levels which can be used to inform the power converter of future load transients. With information about future load transients, an auxiliary circuit can be used to deliver the needed energy to the load at the time of the informed load transient. With a communication scheme between the CPU and power supply, the power supply load transient response can be optimized allowing for a reduction in the total output capacitance, board space, and cost.","abstract_has_math":false,"creators":["Silva, Sergio"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"M.S.","degree_level":"Thesis","degree_discipline":"Electrical & Computer Engr","degree_department":null,"school":null,"contributors":["Hanumonlu, Pavan K"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2020,"date_issued":"2020-08-26T21:58:11Z","date_published":"2020-08-26T21:58:11Z","updated_at":"2026-07-22T22:24:47Z","subjects":["Buck converter, load transient, CPU, Verilog-AMS, circuits"],"languages":["en"],"rights":["Copyright 2020 Sergio Silva"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/2142/108075","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Hanumonlu, Pavan K"]},{"key":"dc:creator","label":"Author","values":["Silva, Sergio"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2020-08-26T21:58:11Z","2020-05-15","2020-05"]},{"key":"dc:type","label":"Dc Type","values":["text","Thesis"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical & Computer Engr"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Thesis"]},{"key":"thesis:degree_name","label":"Degree Name","values":["M.S."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Buck converter, load transient, CPU, Verilog-AMS, circuits"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 2020 Sergio Silva"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/108075"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["In a buck converter, the output capacitance is the dominant factor that determines the magnitude of overshoot/undershoot in the supply voltage during a load transient. In applications such as powering a CPU, the CPU can make computational predictions for its future supply current levels which can be used to inform the power converter of future load transients. With information about future load transients, an auxiliary circuit can be used to deliver the needed energy to the load at the time of the informed load transient. With a communication scheme between the CPU and power supply, the power supply load transient response can be optimized allowing for a reduction in the total output capacitance, board space, and cost.","Submission original under an indefinite embargo labeled 'Open Access'. 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With information about future load transients, an auxiliary circuit can be used to deliver the needed energy to the load at the time of the informed load transient. With a communication scheme between the CPU and power supply, the power supply load transient response can be optimized allowing for a reduction in the total output capacitance, board space, and cost.","Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2020-08-25 without embargo terms","The student, Sergio Silva, accepted the attached license on 2020-05-15 at 15:06.","The student, Sergio Silva, submitted this Thesis for approval on 2020-05-15 at 15:31.","This Thesis was approved for publication on 2020-05-15 at 15:50.","DSpace SAF Submission Ingestion Package generated from Vireo submission #15414 on 2020-08-25 at 17:15:10","Made available in DSpace on 2020-08-26T21:58:11Z (GMT). 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