{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/108060"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/108060","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Generalizing fine-grained message aggregation","abstract":"The divergence of application behavior from optimal network usage leads to performance bottlenecks induced by communication. Communication performances are known to worsen when dealing with large quantities of small messages, due to the overhead of envelopes and going through the communication stack multiple times. Prior work has attempted to mitigate this through the aggregration of small messages, but it has only studied the impact for cases where the size of the message is constant and known ahead of time. This thesis explores the applicability of this optimization to variable-sized messages and machines with a large number of cores, analyzing both the theoretical considerations involved and the performance gains achieved in practice. The work is implemented as an update to the Topological Routing and Aggregation Module(TRAM) of the Charm++ parallel programming system.","abstract_html":"The divergence of application behavior from optimal network usage leads to performance bottlenecks induced by communication. Communication performances are known to worsen when dealing with large quantities of small messages, due to the overhead of envelopes and going through the communication stack multiple times. Prior work has attempted to mitigate this through the aggregration of small messages, but it has only studied the impact for cases where the size of the message is constant and known ahead of time. This thesis explores the applicability of this optimization to variable-sized messages and machines with a large number of cores, analyzing both the theoretical considerations involved and the performance gains achieved in practice. The work is implemented as an update to the Topological Routing and Aggregation Module(TRAM) of the Charm++ parallel programming system.","abstract_has_math":false,"creators":["Narayanan, Venkatasubrahmanian"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"M.S.","degree_level":"Thesis","degree_discipline":"Computer Science","degree_department":null,"school":null,"contributors":["Kale, Laxmikant"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2020,"date_issued":"2020-08-26T21:58:08Z","date_published":"2020-08-26T21:58:08Z","updated_at":"2026-07-22T22:24:47Z","subjects":["Fine-grained parallelism","message aggregation"],"languages":["en"],"rights":["Copyright 2020 Venkatasubrahmanian Narayanan"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/2142/108060","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Kale, Laxmikant"]},{"key":"dc:creator","label":"Author","values":["Narayanan, Venkatasubrahmanian"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2020-08-26T21:58:08Z","2020-05-15","2020-05"]},{"key":"dc:type","label":"Dc Type","values":["text","Thesis"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Computer Science"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Thesis"]},{"key":"thesis:degree_name","label":"Degree Name","values":["M.S."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Fine-grained parallelism","message aggregation"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 2020 Venkatasubrahmanian Narayanan"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/108060"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["The divergence of application behavior from optimal network usage leads to performance bottlenecks induced by communication. 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Prior work has attempted to mitigate this through the aggregration of small messages, but it has only studied the impact for cases where the size of the message is constant and known ahead of time. This thesis explores the applicability of this optimization to variable-sized messages and machines with a large number of cores, analyzing both the theoretical considerations involved and the performance gains achieved in practice. The work is implemented as an update to the Topological Routing and Aggregation Module(TRAM) of the Charm++ parallel programming system.","Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2020-08-25 without embargo terms","The student, Venkatasubrahmanian Narayanan, accepted the attached license on 2020-05-14 at 22:33.","The student, Venkatasubrahmanian Narayanan, submitted this Thesis for approval on 2020-05-14 at 22:49.","This Thesis was approved for publication on 2020-05-15 at 10:16.","DSpace SAF Submission Ingestion Package generated from Vireo submission #15387 on 2020-08-25 at 17:14:41","Made available in DSpace on 2020-08-26T21:58:08Z (GMT). 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