{"id":{"repo_id":"uiuc","oai_identifier":"oai:www.ideals.illinois.edu:2142/105106"},"canonical_url":"https://search.dev.ndltd.org/etd/uiuc/oai:www.ideals.illinois.edu:2142/105106","repository":{"repo_id":"uiuc","name":"University of Illinois - Urbana-Champaign","base_url":"https://www.ideals.illinois.edu/oai-pmh"},"display":{"title":"Page management in hybrid memory systems","abstract":"Recent byte-addressable Non-Volatile Memory (NVM) technologies enable hybrid memory systems comprising of both DRAM and NVM technologies. Such systems have the potential to address the capacity requirements of data intensive workloads and achieve high performance. The main challenge lies in dynamically managing data placement between DRAM and NVM in a flat address space configuration, where the Operating System can allocate pages to either of the two memories. Prior work on this area has proposed software and architectural techniques that can dynamically swap memory pages between the two memories. However, due to the high swap overhead, initiating swaps solely based on hardware counters or relying on software methods hinders the potential for performance gains due to their conservative decision making. In this work, we introduce Prefetching, a novel hybrid memory management scheme that exploits page correlation to identify forthcoming memory accesses and commence swaps ahead of time. The page management techniques proposed by Prefetching effectively hide the overhead of data movement between memories. We evaluate our design with simulations across 17 benchmarks from three different benchmark suites. Thanks to Prefetching's highly accurate swaps, we improve performance by up to 20% and reduce average main memory access time by up to 33% when compared to prior state-of-the-art.","abstract_html":"Recent byte-addressable Non-Volatile Memory (NVM) technologies enable hybrid memory systems comprising of both DRAM and NVM technologies. Such systems have the potential to address the capacity requirements of data intensive workloads and achieve high performance. The main challenge lies in dynamically managing data placement between DRAM and NVM in a flat address space configuration, where the Operating System can allocate pages to either of the two memories. Prior work on this area has proposed software and architectural techniques that can dynamically swap memory pages between the two memories. However, due to the high swap overhead, initiating swaps solely based on hardware counters or relying on software methods hinders the potential for performance gains due to their conservative decision making. In this work, we introduce Prefetching, a novel hybrid memory management scheme that exploits page correlation to identify forthcoming memory accesses and commence swaps ahead of time. The page management techniques proposed by Prefetching effectively hide the overhead of data movement between memories. We evaluate our design with simulations across 17 benchmarks from three different benchmark suites. Thanks to Prefetching's highly accurate swaps, we improve performance by up to 20% and reduce average main memory access time by up to 33% when compared to prior state-of-the-art.","abstract_has_math":false,"creators":["Kokolis, Apostolos"],"institution":"University of Illinois at Urbana-Champaign","degree_name":"M.S.","degree_level":"Thesis","degree_discipline":"Computer Science","degree_department":null,"school":null,"contributors":["Torrellas, Josep"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2019,"date_issued":"2019-08-23T20:36:13Z","date_published":"2019-08-23T20:36:13Z","updated_at":"2026-07-22T22:24:44Z","subjects":["Hybrid Memory Systems","Non-Volatile Memory","Page Swapping"],"languages":["en"],"rights":["Copyright 2019 Apostolos Kokolis"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/2142/105106","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Torrellas, Josep"]},{"key":"dc:creator","label":"Author","values":["Kokolis, Apostolos"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2019-08-23T20:36:13Z","2021-08-24T09:15:24Z","2019-04-26","2019-05"]},{"key":"dc:type","label":"Dc Type","values":["text"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Computer Science"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Thesis"]},{"key":"thesis:degree_name","label":"Degree Name","values":["M.S."]},{"key":"thesis:institution_name","label":"Thesis Institution Name","values":["University of Illinois at Urbana-Champaign"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Hybrid Memory Systems","Non-Volatile Memory","Page Swapping"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en"]},{"key":"dc:rights","label":"Dc Rights","values":["Copyright 2019 Apostolos Kokolis"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/2142/105106"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Recent byte-addressable Non-Volatile Memory (NVM) technologies enable hybrid memory systems comprising of both DRAM and NVM technologies. Such systems have the potential to address the capacity requirements of data intensive workloads and achieve high performance. The main challenge lies in dynamically managing data placement between DRAM and NVM in a flat address space configuration, where the Operating System can allocate pages to either of the two memories. Prior work on this area has proposed software and architectural techniques that can dynamically swap memory pages between the two memories. However, due to the high swap overhead, initiating swaps solely based on hardware counters or relying on software methods hinders the potential for performance gains due to their conservative decision making. In this work, we introduce Prefetching, a novel hybrid memory management scheme that exploits page correlation to identify forthcoming memory accesses and commence swaps ahead of time. The page management techniques proposed by Prefetching effectively hide the overhead of data movement between memories. We evaluate our design with simulations across 17 benchmarks from three different benchmark suites. Thanks to Prefetching's highly accurate swaps, we improve performance by up to 20% and reduce average main memory access time by up to 33% when compared to prior state-of-the-art.","Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2021-05-01","The student, Apostolos Kokolis, accepted the attached license on 2019-04-25 at 19:30.","The student, Apostolos Kokolis, submitted this Thesis for approval on 2019-04-25 at 19:43.","This Thesis was approved for publication on 2019-04-26 at 08:37.","DSpace SAF Submission Ingestion Package generated from Vireo submission #13935 on 2019-08-22 at 15:08:47","Made available in DSpace on 2019-08-23T20:36:13Z (GMT). No. of bitstreams: 2 KOKOLIS-THESIS-2019.pdf: 1006537 bytes, checksum: 12db18813994227c3db0e299275a2113 (MD5) LICENSE.txt: 4214 bytes, checksum: e0e16b76e147a51a2bb0c6a1d0e7e622 (MD5) Previous issue date: 2019-04-26","Embargo set by: Seth Robbins for item 112225 Lift date: 2021-08-23T20:36:18Z Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system","U of I Only Restriction Lifted for Item 112225 on 2021-08-24T09:15:24Z."]},{"key":"dc:format","label":"Dc Format","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Page management in hybrid memory systems"]}]}],"canonical_facts":{"dc:contributor":["Torrellas, Josep"],"dc:creator":["Kokolis, Apostolos"],"dc:date":["2019-08-23T20:36:13Z","2021-08-24T09:15:24Z","2019-04-26","2019-05"],"dc:description":["Recent byte-addressable Non-Volatile Memory (NVM) technologies enable hybrid memory systems comprising of both DRAM and NVM technologies. Such systems have the potential to address the capacity requirements of data intensive workloads and achieve high performance. The main challenge lies in dynamically managing data placement between DRAM and NVM in a flat address space configuration, where the Operating System can allocate pages to either of the two memories. Prior work on this area has proposed software and architectural techniques that can dynamically swap memory pages between the two memories. However, due to the high swap overhead, initiating swaps solely based on hardware counters or relying on software methods hinders the potential for performance gains due to their conservative decision making. In this work, we introduce Prefetching, a novel hybrid memory management scheme that exploits page correlation to identify forthcoming memory accesses and commence swaps ahead of time. The page management techniques proposed by Prefetching effectively hide the overhead of data movement between memories. We evaluate our design with simulations across 17 benchmarks from three different benchmark suites. Thanks to Prefetching's highly accurate swaps, we improve performance by up to 20% and reduce average main memory access time by up to 33% when compared to prior state-of-the-art.","Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2021-05-01","The student, Apostolos Kokolis, accepted the attached license on 2019-04-25 at 19:30.","The student, Apostolos Kokolis, submitted this Thesis for approval on 2019-04-25 at 19:43.","This Thesis was approved for publication on 2019-04-26 at 08:37.","DSpace SAF Submission Ingestion Package generated from Vireo submission #13935 on 2019-08-22 at 15:08:47","Made available in DSpace on 2019-08-23T20:36:13Z (GMT). No. of bitstreams: 2 KOKOLIS-THESIS-2019.pdf: 1006537 bytes, checksum: 12db18813994227c3db0e299275a2113 (MD5) LICENSE.txt: 4214 bytes, checksum: e0e16b76e147a51a2bb0c6a1d0e7e622 (MD5) Previous issue date: 2019-04-26","Embargo set by: Seth Robbins for item 112225 Lift date: 2021-08-23T20:36:18Z Reason: Author requested U of Illinois access only (OA after 2yrs) in Vireo ETD system","U of I Only Restriction Lifted for Item 112225 on 2021-08-24T09:15:24Z."],"dc:format":["application/pdf"],"dc:identifier":["http://hdl.handle.net/2142/105106"],"dc:language":["en"],"dc:rights":["Copyright 2019 Apostolos Kokolis"],"dc:subject":["Hybrid Memory Systems","Non-Volatile Memory","Page Swapping"],"dc:title":["Page management in hybrid memory systems"],"dc:type":["text"],"thesis:degree_discipline":["Computer Science"],"thesis:degree_level":["Thesis"],"thesis:degree_name":["M.S."],"thesis:institution_name":["University of Illinois at Urbana-Champaign"]},"updated_at":"2026-07-22T22:24:44Z"}