{"id":{"repo_id":"uic","oai_identifier":"oai:figshare.com:article/32995724"},"canonical_url":"https://search.dev.ndltd.org/etd/uic/oai:figshare.com:article/32995724","repository":{"repo_id":"uic","name":"University of Illinois - Chicago","base_url":"https://api.figshare.com/v2/oai"},"display":{"title":"Gaussian Splatting Device-Architecture Co-Design for Accelerated Physical AI Inference and Reasoning","abstract":"Modern autonomous systems, including robotics, autonomous driving, and XR/AR, demand 3D scene representations that are simultaneously photorealistic, memory-efficient, and computationally lean. Gaussian Splatting has established itself as the state-of-the-art technique for 3D scene representation, delivering photorealistic rendering quality that surpasses traditional methods. However, this fidelity comes at a steep computational cost, requiring extensive memory bandwidth and desktop-grade GPU resources to achieve real-time performance, which effectively precludes deployment on edge devices. This thesis addresses these hardware limitations through a novel device-architecture co-design leveraging Gaussian transistors. Unlike conventional silicon devices, the Gaussian transistor exhibits a current-voltage (I-V) characteristic that naturally mimics the Gaussian function, enabling intrinsic computation of splatting operations. We present a specialized accelerator utilizing this technology to minimize computational overhead. This research also demonstrates the practical utility of this accelerator in enabling real-time, power-efficient physical reasoning and inference within the 3D world.","abstract_html":"Modern autonomous systems, including robotics, autonomous driving, and XR/AR, demand 3D scene representations that are simultaneously photorealistic, memory-efficient, and computationally lean. Gaussian Splatting has established itself as the state-of-the-art technique for 3D scene representation, delivering photorealistic rendering quality that surpasses traditional methods. However, this fidelity comes at a steep computational cost, requiring extensive memory bandwidth and desktop-grade GPU resources to achieve real-time performance, which effectively precludes deployment on edge devices. This thesis addresses these hardware limitations through a novel device-architecture co-design leveraging Gaussian transistors. Unlike conventional silicon devices, the Gaussian transistor exhibits a current-voltage (I-V) characteristic that naturally mimics the Gaussian function, enabling intrinsic computation of splatting operations. We present a specialized accelerator utilizing this technology to minimize computational overhead. This research also demonstrates the practical utility of this accelerator in enabling real-time, power-efficient physical reasoning and inference within the 3D world.","abstract_has_math":false,"creators":["Sureshkumar Senthilkumar (24400619)"],"institution":null,"degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":null,"school":null,"contributors":[],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2026,"date_issued":"2026-05-01T00:00:00Z","date_published":"2026-05-01T00:00:00Z","updated_at":"2026-07-27T21:33:56Z","subjects":["Computer Science","Engineering, Electronics and Electrical"],"languages":[],"rights":["In Copyright","Open Access after 2031-05-01"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"https://doi.org/10.25417/uic.32995724.v1","outbound_label":"DOI","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:creator","label":"Author","values":["Sureshkumar Senthilkumar (24400619)"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2026-05-01T00:00:00Z"]},{"key":"dc:relation","label":"Dc Relation","values":["https://figshare.com/articles/thesis/Gaussian_Splatting_Device-Architecture_Co-Design_for_Accelerated_Physical_AI_Inference_and_Reasoning/32995724"]},{"key":"dc:type","label":"Dc Type","values":["Text","Thesis"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Computer Science","Engineering, Electronics and Electrical"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:rights","label":"Dc Rights","values":["In Copyright","Open Access after 2031-05-01"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["10.25417/uic.32995724.v1"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Modern autonomous systems, including robotics, autonomous driving, and XR/AR, demand 3D scene representations that are simultaneously photorealistic, memory-efficient, and computationally lean. Gaussian Splatting has established itself as the state-of-the-art technique for 3D scene representation, delivering photorealistic rendering quality that surpasses traditional methods. However, this fidelity comes at a steep computational cost, requiring extensive memory bandwidth and desktop-grade GPU resources to achieve real-time performance, which effectively precludes deployment on edge devices. This thesis addresses these hardware limitations through a novel device-architecture co-design leveraging Gaussian transistors. Unlike conventional silicon devices, the Gaussian transistor exhibits a current-voltage (I-V) characteristic that naturally mimics the Gaussian function, enabling intrinsic computation of splatting operations. We present a specialized accelerator utilizing this technology to minimize computational overhead. This research also demonstrates the practical utility of this accelerator in enabling real-time, power-efficient physical reasoning and inference within the 3D world."]},{"key":"dc:title","label":"Title","values":["Gaussian Splatting Device-Architecture Co-Design for Accelerated Physical AI Inference and Reasoning"]}]}],"canonical_facts":{"dc:creator":["Sureshkumar Senthilkumar (24400619)"],"dc:date":["2026-05-01T00:00:00Z"],"dc:description":["Modern autonomous systems, including robotics, autonomous driving, and XR/AR, demand 3D scene representations that are simultaneously photorealistic, memory-efficient, and computationally lean. Gaussian Splatting has established itself as the state-of-the-art technique for 3D scene representation, delivering photorealistic rendering quality that surpasses traditional methods. However, this fidelity comes at a steep computational cost, requiring extensive memory bandwidth and desktop-grade GPU resources to achieve real-time performance, which effectively precludes deployment on edge devices. This thesis addresses these hardware limitations through a novel device-architecture co-design leveraging Gaussian transistors. Unlike conventional silicon devices, the Gaussian transistor exhibits a current-voltage (I-V) characteristic that naturally mimics the Gaussian function, enabling intrinsic computation of splatting operations. We present a specialized accelerator utilizing this technology to minimize computational overhead. This research also demonstrates the practical utility of this accelerator in enabling real-time, power-efficient physical reasoning and inference within the 3D world."],"dc:identifier":["10.25417/uic.32995724.v1"],"dc:relation":["https://figshare.com/articles/thesis/Gaussian_Splatting_Device-Architecture_Co-Design_for_Accelerated_Physical_AI_Inference_and_Reasoning/32995724"],"dc:rights":["In Copyright","Open Access after 2031-05-01"],"dc:subject":["Computer Science","Engineering, Electronics and Electrical"],"dc:title":["Gaussian Splatting Device-Architecture Co-Design for Accelerated Physical AI Inference and Reasoning"],"dc:type":["Text","Thesis"]},"updated_at":"2026-07-27T21:33:56Z"}