{"id":{"repo_id":"ubc","oai_identifier":"oai:circle.library.ubc.ca:2429/2130"},"canonical_url":"https://search.dev.ndltd.org/etd/ubc/oai:circle.library.ubc.ca:2429/2130","repository":{"repo_id":"ubc","name":"University of British Columbia","base_url":"http://circle.library.ubc.ca/oai/request"},"display":{"title":"On the parallel implementation of OSI protocol processing systems","abstract":"In a heterogeneous computing environment, computers have to use a suitable transfer syntax to communicate with each other because of the differences in data representations in each computer. The need to translate the data from one format to another, which can be under-stood by all computers, takes over 90% of the processing power used for protocol processings. Application specific architectures in a heterogeneous system may not be efficient in performing protocol processing functions and there is a need for a stand alone protocol processing system. In a gigabit networking environment, the processing power required for protocol processing is beyond that of a single processor and a multiprocessor approach is needed. Three different multiprocessor architectures with increasing complexities for protocol processing are described in this thesis. These designs make use of the properties of locality of processing and prefetching techniques. Both simulations and analytical methods are used to evaluate the performance. The results indicated that by putting instructions and packet data close to the processors, a significant increase in processing throughput can be obtained as compared to previously published designs. In our best scenario, we obtained a throughput of up to560MBits/s. With further optimizations, it is expected that the throughput can be extended to a gigabit rate. The study also revealed that a bus based architecture is sufficient in handling the OSI protocol processing requirement for a network rate of over 560MBits/s. It was observed that the use of fast processors alone without matching fast memory is inadequate in providing a feasible solution. The sequential nature of protocol definition could be changed to include more parallelism and to further improve the scalability of the protocol processing system.","abstract_html":"In a heterogeneous computing environment, computers have to use a suitable transfer syntax to communicate with each other because of the differences in data representations in each computer. The need to translate the data from one format to another, which can be under-stood by all computers, takes over 90% of the processing power used for protocol processings. Application specific architectures in a heterogeneous system may not be efficient in performing protocol processing functions and there is a need for a stand alone protocol processing system. In a gigabit networking environment, the processing power required for protocol processing is beyond that of a single processor and a multiprocessor approach is needed. Three different multiprocessor architectures with increasing complexities for protocol processing are described in this thesis. These designs make use of the properties of locality of processing and prefetching techniques. Both simulations and analytical methods are used to evaluate the performance. The results indicated that by putting instructions and packet data close to the processors, a significant increase in processing throughput can be obtained as compared to previously published designs. In our best scenario, we obtained a throughput of up to560MBits/s. With further optimizations, it is expected that the throughput can be extended to a gigabit rate. The study also revealed that a bus based architecture is sufficient in handling the OSI protocol processing requirement for a network rate of over 560MBits/s. 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