High-power GaAs-based diode lasers with novel lateral designs for enhanced brightness, threshold and efficiency

In an ever-growing multi-billion-dollar laser device market, semiconductor diode lasers continue to be in high demand as one of the most widely-used device types, generating a large share of the total revenue. GaAs-based broad-area diode lasers (BALs) operating in the 9xx nm wavelength range offer the highest optical power (Popt) among diode lasers and the highest power conversion efficiency (ηE) among all light sources. This makes them ideal for high-power material processing applications such as metal cutting and welding, where they are either utilized directly or as pump sources for solid-state and fiber lasers. In addition to high Popt and ηE, these applications also benefit from high beam quality, which is offered by BALs along the vertical (fast) axis but less so along the lateral (slow) axis, corresponding to relatively high lateral beam parameter product (BPPlat) and low lateral brightness (Blat = Popt / BPPlat). To enhance material-processing systems and enable new applications, BALs with ever-higher Popt, ηE and Blat are highly desirable, with high degree of polarization (DoP) as an additional requirement that enables Popt doubling with no BPPlat penalty via polarization beam combining. Such performance enhancements are dependent on identifying the thermal and non-thermal mechanisms that limit different aspects of BAL performance, and implementing design changes to minimize their negative impacts. In this dissertation, novel designs based on lateral structuring are devised and developed, aiming to address various performance-limiting mechanisms acting along the lateral axis, thereby enabling enhanced BAL performance. The first novel lateral design is the enhanced self-aligned structure (eSAS), an improved version of the established self-aligned structure, based on integrating laterally-structured current-blocking layers outside the BAL stripe. By confining current (and charge carriers) to the center, it aims to enhance BAL performance by minimizing two non-thermal performance-limiting mechanisms, namely lateral current spreading and lateral carrier accumulation (LCA) at the stripe edges. A detailed and comprehensive eSAS study constitutes the main part of this dissertation, starting with developing and optimizing two eSAS design variants using device modeling and simulation tools, which are then realized in trial and full wafer processes with quality control tests used to verify their correct implementation, followed by test device mounting and characterization under continuous-wave operation at 25 °C, and finally performance analysis and benchmarking. In comparison to gain-guided reference BALs, eSAS BALs are found to have strongly reduced threshold current with power-current slope and series resistance roughly unchanged, leading to an increase in peak ηE by up to 1.5 percentage points, reaching up to 69%. They also demonstrate strong narrowing of the near-field width with the far-field angle roughly unchanged, leading to a Blat increase by up to 13.5%, reaching up to 3.43 W/(mm·mrad). In addition, they exhibit very high DoP (~99% on average), showing no degradation resulting from the lateral structuring. Overall, eSAS BALs are shown to exhibit state-of-the-art performance, demonstrating simultaneously high ηE, Blat and DoP up to high Popt levels. The second novel lateral design is based on confining heat flow under the central stripe and limiting its dissipation outside it, with the aim of flattening the lateral temperature profile around the active zone, corresponding to reduced thermal lens curvature, which is associated with reduced far-field blooming and enhanced beam quality. This is achieved by laterally structuring p-side epitaxial layers, replacing them outside the stripe with heat-blocking materials with low thermal conductivity (k), with examples including InGaP or InGaAsP (lattice-matched to GaAs), a superlattice of alternating InGaP and InGaAsP layers, photonic crystals with air holes, porous oxides or nitrides, or simply air in a mesa configuration. Similar approaches have previously been implemented outside the semiconductor chip (structuring p-side metallization), exhibiting Blat enhancement, but their impact is expected to be limited by the experimentally-observed thermal barrier at the p-side semiconductor–metal interface, thus motivating this alternative chip-internal approach. Using a detailed two-dimensional mounted BAL model, finite-element thermal simulations, calibrated against thermal camera images, are carried out to compare heat distribution within different lateral design variants in comparison to the gain-guided reference. Significant reduction of thermal lens curvature is demonstrated using the novel design, reaching up to 13%, 17% and 73% using InGaP, superlattice, and air, respectively, coming at the expense of increased process complexity (in case of InGaP and superlattice), or increased thermal resistance and risk of DoP degradation (in case of air). The simulation results nonetheless demonstrate that this novel lateral design is a promising approach for enhancing beam quality and increasing Blat, thereby motivating its practical realization as an exciting topic for future studies.

Author dc:creator

• Elattar, Mohamed

Advisor dc:contributor.advisor

• Tränkle, Günther

Licence dc:rights.uri

• https://creativecommons.org/licenses/by/4.0/

Language dc:language.iso

en

Identifier URI

https://doi.org/10.14279/depositonce-20028

OAI identifier oai:identifier

oai:depositonce.tu-berlin.de:11303/21228