From Software Threads to Parallel Hardware with LegUp High-level Synthesis

High-level synthesis (HLS) can automatically synthesize software to hardware. With the design specification in software, HLS can reduce the lengthy design cycles of hardware, and make the performance and energy-efficiency benefits of hardware accessible to those without hardware skills. Since the introduction of the first C-based HLS tools more than a decade ago, however, the adaption of the technology has been slow by both software and hardware engineers. We attribute this to two key factors: 1) For hardware engineers, there is still a gap between HLS-generated hardware and human-designed hardware, partly due to the inability of HLS tools to fully exploit hardware parallelism, and 2) for software engineers, HLS remains to be a difficult endeavour, as many parts of the design, such as system integration, largely remain a manual process. This dissertation provides an HLS framework, LegUp, which seeks to address both issues. LegUp can compile an entire software program to hardware to produce a hardware-only system, or it can also automatically partition the program to generate a processor-accelerator hybrid system, wherein the compute-intensive program segments are accelerated by hardware, with the remaining segments executed in software on a processor. In both cases, a complete system is generated, including necessary memories and interconnect. To allow one to easily exploit hardware parallelism, we provide HLS support for synthesizing parallel software to parallel hardware. In particular, we support automatically compiling a multi-threaded program with Pthreads and OpenMP to parallel hardware accelerators that operate concurrently within a hardware-only or a processor-accelerator hybrid system. In the context of parallel hardware, we investigate architectural and memory optimizations that help to improve circuit performance and area, and discuss a method of using the producer-consumer pattern in software to infer a streaming circuit in hardware. With these techniques, we show that LegUp can produce high-performance hardware that can be competitive to circuits that are generated by commercial HLS tools, and demonstrate that LegUp-generated circuits can also outperform software executing on x86 processors.

Department dc:contributor.department

Electrical and Computer Engineering

Year dc:date.issued

2016

Author dc:creator

• Choi, Jongsok

Advisors dc:contributor.advisor

• Anderson, Jason H
• Brown, Stephen D

• Field-programmable gate array
• Hardware/Software co-design
• High-level synthesis
• LegUp High-Level Synthesis Framework
• Parallel hardware
• System-on-Chip

Handle dc:identifier.uri

http://hdl.handle.net/1807/76380

OAI identifier oai:identifier

oai:utoronto.scholaris.ca:1807/76380