Design and modeling of superconducting hardware for implementing quantum stabilizers

<p>Superconducting qubits are one of the leading systems for implementing quantum processors. Realizing fault-tolerant quantum computation requires some form of quantum error correction, which typically involves performing repeated stabilizer operations on groups of physical qubits in an array to form a logical qubit with enhanced protection against errors. Realizing a logical qubit that is suitable for running quantum algorithms requires an array with a significant number of physical qubits, which is extremely challenging. However, the physical qubit overhead can be reduced by lowering the error rate on the physical qubits. Current state-of-the-art superconducting qubit designs do not have robust protection against all types of errors. Reducing error rates on these conventional qubits requires further advances in fabrication, materials, and device packaging to reduce the noise and perturbations coupled to the qubit.<p>Another approach to reduce the error rates is to develop new qubit designs that have intrinsic protection against all types of errors. The charge-parity qubit is one such design. Conventional superconducting qubits are based on Josephson junctions, which have a 2π-periodic dependence on the superconducting phase difference across the junction. The charge-parity qubit is formed from a chain of plaquettes, each of which behaves as a π-periodic Josephson element. For appropriate parameters, the effective coupling Hamiltonian between plaquettes in a charge-parity qubit is equivalent to the implementation of a quantum stabilizer in superconducting hardware. In this thesis, I present the experimental realization of plaquette-chain devices that exhibit such stabilizer behavior. The plaquette devices are fabricated with arrays of Josephson junctions, with multiple on-chip flux- and charge-bias lines for local biasing of the various device elements. Microwave spectroscopy measurements allow for a characterization of the transitions between the different energy levels of the plaquette chain and their dispersion with flux and charge bias of the various device elements. Extensive numerical modeling of the energy-level structure and comparison with the measured transition spectra indicates that the device exhibits protection against local noise. This work paves the way for future qubits based on this design with optimized parameters and implementations that are capable of achieving dramatic reductions in error rates beyond the current state of the art.

Name thesis:degree_name

Doctor of Philosophy (PhD)

Level thesis:degree_level

Dissertation

Discipline thesis:degree_discipline

Physics

Year

2022

Author dc:creator

• Liu, Yebin

Contributors dc:contributor

• Plourde, Britton

• charge-parity qubit
• hardware stabilizer
• protected qubit
• quantum computation
• Physics

Repository record dc:identifier

https://surface.syr.edu/etd/1607

OAI identifier oai:identifier

oai:surface.syr.edu:etd-2608