A Reconfigurable Implementation of Bayesian Phylogenetic Inference

<p>The field of evolutionary biology has become reliant on the ability to quickly and accurately infer phylogenies, but current software solutions for phylogenetic inference are inadequate to keep up with the growing demands of biologists. FPGA co-processor architectures have been shown to effectively speed up the performance of software applications by performing the most time-consuming parts of the algorithm on custom hardware. The goal of this thesis is to investigate a reconfigurable hardware implementation of the popular phylogenetic inference software MrBayes. This work details the development of an FPGA design that works with the MrBayes software to perform tree likelihood calculations that are needed for the algorithm. The design is implemented and tested in order to study the potential of reconfigurable hardware to accelerate MrBayes.</p>

Name thesis:degree_name

MS

Level thesis:degree_level

Campus Access Thesis

Discipline thesis:degree_discipline

Computer Science and Engineering

Year

2009

Author dc:creator

• Zierke, Stephanie

Contributors dc:contributor

• Jason D. Bakos

• Computer Sciences
• Electrical and Computer Engineering
• Engineering
• Physical Sciences and Mathematics

Statement dc:rights

• © 2009, Stephanie Zierke

Repository record dc:identifier

https://scholarcommons.sc.edu/etd/120

OAI identifier oai:identifier

oai:scholarcommons.sc.edu:etd-1121