{"id":{"repo_id":"siu-theses","oai_identifier":"oai:opensiuc.lib.siu.edu:dissertations-2529"},"canonical_url":"https://search.dev.ndltd.org/etd/siu-theses/oai:opensiuc.lib.siu.edu:dissertations-2529","repository":{"repo_id":"siu-theses","name":"Southern Illinois University","base_url":"https://opensiuc.lib.siu.edu/do/oai/"},"display":{"title":"Leading Digit Computation Circuits","abstract":"As the amount of data generated increases, so does the amount of data processing. However for some applications, a decision can be made using partial results obtained mid-computation. This research presents three MSB-first computation circuits which allow for early computation termination: an accumulator, a comparator and an arithmetic processing element. The circuits are constructed based on a novel carry propagation shift-register design. Results for various size inputs show a decrease in the number of clock cycles necessary to make a decision compared to existing techniques. In addition, the number of bits used in the computation is reduced, thereby decreasing the number of bits fetched from memory.","abstract_html":"As the amount of data generated increases, so does the amount of data processing. However for some applications, a decision can be made using partial results obtained mid-computation. This research presents three MSB-first computation circuits which allow for early computation termination: an accumulator, a comparator and an arithmetic processing element. The circuits are constructed based on a novel carry propagation shift-register design. Results for various size inputs show a decrease in the number of clock cycles necessary to make a decision compared to existing techniques. In addition, the number of bits used in the computation is reduced, thereby decreasing the number of bits fetched from memory.","abstract_has_math":false,"creators":["Hounsinou, Sena G"],"institution":null,"degree_name":"Doctor of Philosophy","degree_level":"Campus Only Dissertation","degree_discipline":"Electrical and Computer Engineering","degree_department":null,"school":null,"contributors":["Wang, Haibo"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2018,"date_issued":"2018-05-01T07:00:00Z","date_published":"2018-05-01T07:00:00Z","updated_at":"2026-07-24T04:35:34Z","subjects":[],"languages":[],"rights":[],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"https://opensiuc.lib.siu.edu/dissertations/1525","outbound_label":"Repository record","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Wang, Haibo"]},{"key":"dc:creator","label":"Author","values":["Hounsinou, Sena G"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical and Computer Engineering"]},{"key":"thesis:degree_level","label":"Degree Level","values":["Campus Only Dissertation"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Doctor of Philosophy"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["https://opensiuc.lib.siu.edu/dissertations/1525"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["As the amount of data generated increases, so does the amount of data processing. However for some applications, a decision can be made using partial results obtained mid-computation. This research presents three MSB-first computation circuits which allow for early computation termination: an accumulator, a comparator and an arithmetic processing element. The circuits are constructed based on a novel carry propagation shift-register design. Results for various size inputs show a decrease in the number of clock cycles necessary to make a decision compared to existing techniques. In addition, the number of bits used in the computation is reduced, thereby decreasing the number of bits fetched from memory."]},{"key":"dc:title","label":"Title","values":["Leading Digit Computation Circuits"]}]}],"canonical_facts":{"dc:contributor":["Wang, Haibo"],"dc:creator":["Hounsinou, Sena G"],"dc:description.abstract":["As the amount of data generated increases, so does the amount of data processing. However for some applications, a decision can be made using partial results obtained mid-computation. This research presents three MSB-first computation circuits which allow for early computation termination: an accumulator, a comparator and an arithmetic processing element. The circuits are constructed based on a novel carry propagation shift-register design. Results for various size inputs show a decrease in the number of clock cycles necessary to make a decision compared to existing techniques. In addition, the number of bits used in the computation is reduced, thereby decreasing the number of bits fetched from memory."],"dc:identifier":["https://opensiuc.lib.siu.edu/dissertations/1525"],"dc:title":["Leading Digit Computation Circuits"],"thesis:degree_discipline":["Electrical and Computer Engineering"],"thesis:degree_level":["Campus Only Dissertation"],"thesis:degree_name":["Doctor of Philosophy"]},"updated_at":"2026-07-24T04:35:34Z"}