A Charge Pump Architecture with High Power-Efficiency and Low Output Ripple Noise in 0.5 μm CMOS Process Technology

Modi, Primit

Back to results

Rochester Institute of Technology

A Charge Pump Architecture with High Power-Efficiency and Low Output Ripple Noise in 0.5 μm CMOS Process Technology

dc:creator Modi, Primit

thesis:degree_name Electrical Engineering (MS)

Degree

thesis:*

Name thesis:degree_name: Electrical Engineering (MS)
Level thesis:degree_level: Thesis

Author and committee

dc:creator, dc:contributor.*

Author dc:creator: Modi, Primit
Contributors dc:contributor: Robert J. Bowman

Subjects

dc:subject × 4

Identifiers

dc:identifier.*

Repository record dc:identifier: https://repository.rit.edu/theses/8603
OAI identifier oai:identifier: oai:repository.rit.edu:theses-9748

Chain of custody

source

Harvested from: Rochester Institute of Technology
Base URL: repository.rit.edu/do/oai/
Last updated: 2026-07-27
Source record: OAI-PMH GetRecord

related terms

citation

Modi, Primit. A Charge Pump Architecture with High Power-Efficiency and Low Output Ripple Noise in 0.5 μm CMOS Process Technology. Thesis thesis, https://repository.rit.edu/theses/8603

A Charge Pump Architecture with High Power-Efficiency and Low Output Ripple Noise in 0.5 μm CMOS Process Technology

Degree

Author and committee

Subjects

Identifiers

Chain of custody

More from Rochester Institute of Technology