Back to results
Rochester Institute of Technology
Modeling of a hardware VLSI placement system: Accelerating the Simulated Annealing algorithm
Degree
thesis:*- Name thesis:degree_name
- Computer Engineering (MS)
- Level thesis:degree_level
- Thesis
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Batts, William Merle, Jr.
- Contributors dc:contributor
-
- Marcin Łukowiak
Identifiers
dc:identifier.*- Repository record dc:identifier
- https://repository.rit.edu/theses/8108
- OAI identifier oai:identifier
- oai:repository.rit.edu:theses-9112