FPGA implementation of Reed Solomon codec for 40Gbps Forward Error Correction in optical networks

Wai, Kenny Chung Chung

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Rochester Institute of Technology

FPGA implementation of Reed Solomon codec for 40Gbps Forward Error Correction in optical networks

dc:creator Wai, Kenny Chung Chung

thesis:degree_name Computer Engineering (MS)

Degree

thesis:*

Name thesis:degree_name: Computer Engineering (MS)
Level thesis:degree_level: Thesis

Author and committee

dc:creator, dc:contributor.*

Author dc:creator: Wai, Kenny Chung Chung
Contributors dc:contributor: Shanchieh Jay Yang

Identifiers

dc:identifier.*

Repository record dc:identifier: https://repository.rit.edu/theses/8048
OAI identifier oai:identifier: oai:repository.rit.edu:theses-8953

Chain of custody

source

Harvested from: Rochester Institute of Technology
Base URL: repository.rit.edu/do/oai/
Last updated: 2026-07-27
Source record: OAI-PMH GetRecord

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citation

Wai, Kenny Chung Chung. FPGA implementation of Reed Solomon codec for 40Gbps Forward Error Correction in optical networks. Thesis thesis, https://repository.rit.edu/theses/8048

FPGA implementation of Reed Solomon codec for 40Gbps Forward Error Correction in optical networks

Degree

Author and committee

Identifiers

Chain of custody

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