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Rice University

Cluster assignment and instruction scheduling for partitioned register-set machines

Abstract

dc:description.abstract

For half a century, computer architects have been striving to improve uniprocessor computer performance. Many of their successful designs such as VLIW and superscalar machines use multiple functional units trying to exploit instruction level parallelism in computer programs. As the number of functional units rises, another hardware constraint enters the picture---the number of register-file ports needed grows directly with the number of functional units. At some point, the multiplexing logic on register ports can come to dominate the processor's cycle time. A reasonable solution is to partition the register file into independent sets and associate each functional unit with a specific register set. Such partitioned register sets have appeared in a number of commercial machines, such as Texas Instruments TMS320C6xxx DSP chips. Partitioned register-set architectures present a new set of challenges to compiler designers---the compiler must assign each operation to a specific clusters and coordinate data movement between clusters. In this thesis, we investigate five instruction scheduling methods with different scopes to find a suitable one for partitioned register-set architectures. Next, we examine previous algorithms for the combined cluster assignment and scheduling problem and propose two new algorithms that improve upon the prior art. Then we study the difficulties introduced by limited number of registers and provide an approach to handle them. Finally we take several other measurements of partitioned register-set architectures that may shed light on some of the architectural decisions.

Degree

thesis:*
Name thesis:degree_name
Master of Science
Level thesis:degree_level
Masters
Discipline thesis:degree_discipline
Engineering
Grantor
Rice University
Year dc:date.issued
2000

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • He, Jingsong
Advisor dc:contributor.advisor
  • Cooper, Keith D.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • Copyright is held by the author, unless otherwise indicated. Permission to reuse, publish, or reproduce the work beyond the bounds of fair use or other exemptions to copyright law must be obtained from the copyright holder.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
https://hdl.handle.net/1911/17340
OAI identifier oai:identifier
oai:repository.rice.edu:1911/17340

Chain of custody

source
Harvested from
Rice University
Base URL
repository.rice.edu/server/oai/request
Last updated
2026-07-24
Source record
OAI-PMH GetRecord
citation

He, Jingsong. Cluster assignment and instruction scheduling for partitioned register-set machines. Masters thesis, Rice University, 2000. https://hdl.handle.net/1911/17340