Abstract
dc:description.abstractDue to the need for fast and energy-efficient accesses to growing amounts of data, the share and number of embedded memories inside modern microchips has been continuously increasing within the last years. Since embedded memories have the highest integration density of a fabrication technology they pose special test challenges due to complex manufacturing defects as well as strong transistor aging phenomena. This necessitates efficient methods for detecting more subtle defects while keeping test costs low. This work presents novel methods and techniques for improving the efficiency of embedded memory manufacturing tests. The proposed methods are demonstrated in an industrial setting based on production-proven transistor, memory as well as chip models and their benefits over the current state-of-the art is worked out.
Degree
thesis:*- Level thesis:degree_level
- thesis.doctoral
- Grantor dc:publisher
- Universität Passau
- Year
- 2018
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Kinseher, Josef
- Contributors dc:contributor
-
- Polian, Ilia
Rights
dc:rights- Statement dc:rights
-
- Standardbedingung laut Einverständniserklärung
Identifiers
dc:identifier.*- Repository record source_url
- https://opus4.kobv.de/opus4-uni-passau/frontdoor/index/index/docId/601
- OAI identifier oai:identifier
- oai:kobv.de-opus4-uni-passau:601