A field programmable gate array based software defined radio design for the space environment

This thesis focuses on a Software Defined Radio (SDR) designed to compress a wideband radio signal input for a narrowband signal output. The design is based on a Field Programmable Gate Array (FPGA), which is chosen for its reprogrammability, flexibility, and our ability to introduce fault tolerance into the design. Software design tools allowed programming to be done at a high level, thereby allowing more progress on the design. This thesis focuses on one such SDR that was designed at a high level of abstraction. This thesis documents an analysis of the memory and timing requirements of the circuit so that it may be used on resource-constrained FPGA devices. It also explores the operating capabilities and limitations for this circuit under various resourceconstrained conditions and introduces algorithms for fault detection to make the circuit more compatible with the space environment.

Grantor dc:publisher

Monterey, California: Naval Postgraduate School

Year dc:date.issued

2009

Author dc:creator

• Livingston, Jeremy V.

Advisors dc:contributor.advisor

• Kragh, Frank E.
• Loomis, Herschel

Handle dc:identifier.uri

https://hdl.handle.net/10945/4495

OAI identifier oai:identifier

oai:calhoun.nps.edu:10945/4495