Trustworthy system development through high-level synthesis

Major processor manufacturers have embraced the high-level synthesis (HLS) design philosophy. HLS offers the potential to explore the design space of electronic circuits and systems more efficiently than traditional methods. In this thesis, we investigate the ap-plication of HLS to hardware-oriented security and trust by developing a model of a simple 16-bit Central Processing Unit in the SystemC modeling language. We enhanced our processor with a simple security mechanism that enforces a memory integrity policy. The integrity policy allows a region of the program labeled as trustworthy to modify any address in data memory, but another region of the program labeled as untrustworthy is restricted to only being able to modify a specific region of data memory. Our timing results show that adding the integrity policy enforcement mechanism has a negligible effect on overall system performance.

Department dc:contributor.department

Computer Science

Grantor dc:publisher

Monterey, California: Naval Postgraduate School

Year dc:date.issued

2014

Author dc:creator

• Patterson, Isaac

Advisor dc:contributor.advisor

• Huffmire, Theodore

Statement dc:rights

• This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. Copyright protection is not available for this work in the United States.

Handle dc:identifier.uri

https://hdl.handle.net/10945/43974

OAI identifier oai:identifier

oai:calhoun.nps.edu:10945/43974