Back to results

NJIT

A co-processor design to support MPI primitives in configurable multiprocessor designs

Abstract

dc:description.abstract

The Message-Passing Interface (MIPI) is a widely used standard for inter-processor communication in parallel computers. This standard is normally implemented in software, thus resulting in large communication latencies. A hardware implementation can reduce communication latencies significantly, thereby increasing the bandwidth. However, this approach cannot be applied in practice to the very large set of functions in MPI. Reconfigurable computing has reached levels where entire parallel systems can be built inside one or more FPGAs (Field-Programmable Gate Arrays). In this scheme, specialized components must be built for inter-processor communication and the resulting code is difficult to port to other reconfigurable platforms. In addition, direct performance comparison with conventional parallel computers is not possible since the latter often employ MPI. Introducing MPI primitives in reconfigurable computing creates a framework for efficient code development involving data exchanges, independently of the underlying hardware implementation. This thesis presents the design and evaluation of a coprocessor that implements a set of MPI primitives. These primitives form a universal and orthogonal set that can be used to implement any other MPI function. A router that can be used to interconnect many such coprocessors in order to build a multi-processor system is also designed and implemented. The entire design is implemented in the VHDL hardware description language, synthesized using Synplicity Synplify Pro and finally mapped onto the Annapolis Microsystems WILDSTAR-II development board that contains two Xilinx Virtex-LI FPGAs.

Degree

thesis:*
Name thesis:degree_name
Master of Science in Computer Engineering - (M.S.)
Discipline thesis:degree_discipline
Electrical and Computer Engineering
Year
2005

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Bafna, Rohan
Contributors dc:contributor
  • Sotirios Ziavras
  • Alexandros V. Gerbessiotis
  • Roberto Rojas-Cessa

Subjects

dc:subject × 3

Identifiers

dc:identifier.*
Repository record dc:identifier
https://digitalcommons.njit.edu/theses/457
OAI identifier oai:identifier
oai:digitalcommons.njit.edu:theses-1456

Chain of custody

source
Harvested from
NJIT
Base URL
digitalcommons.njit.edu/do/oai/
Last updated
2026-07-24
Source record
OAI-PMH GetRecord
citation

Bafna, Rohan. A co-processor design to support MPI primitives in configurable multiprocessor designs. 2005. https://digitalcommons.njit.edu/theses/457