{"id":{"repo_id":"njit","oai_identifier":"oai:digitalcommons.njit.edu:dissertations-1433"},"canonical_url":"https://search.dev.ndltd.org/etd/njit/oai:digitalcommons.njit.edu:dissertations-1433","repository":{"repo_id":"njit","name":"NJIT","base_url":"https://digitalcommons.njit.edu/do/oai/"},"display":{"title":"Influence of SiNx/Si interface states on Si solar cells","abstract":"Impact of the SiN_x/n^+-Si interface on silicon solar cell performance was investigated, where SiN_x is used as a passivation layer. Significant shifts in capacitance, conductance and leakage current characteristics were observed for metal/SiN:H/n^+-Si MOS capacitor when it was subjected to a constant voltage stress (CVS) of +10V at room temperature. The interface trap density (D_{it}) across the SiN:H/n^+-Si interface increased from 6.3 x 10^9 to 7.5 x 10^9 cm^{-2} eV^{-1} after a 500-second stress whereas the n^+/p junction diode remained unaffected by the stress. A direct correlation between the degradation of SiN:H/Si interface and the solar cell performance was observed. It is seen that there is a decrease in the open-circuit voltage (V_{oc}) from 570 to 550 mV due to CVS. No significant change in short-circuit current (I_{sc}) is observed whereas the conversion efficiency ([eta]) decreases from 12.1 to 11.6% due to CVS. Therefore, the decrease in conversion efficiency by ~ 4.13% is due to increase in D_{it} after 500s stressing. CVS study on Cu/SiN_x/n^+ MOS capacitor both under dark and light illumination is carried out. It is observed that the degradation in solar cell parameters is more when the MOS capacitor is stressed under illumination compared to dark condition. It is also seen that there is a shift in both C-V and G-V characteristics after 5 hrs of light soaking. Thus, an increment in interface trap density (D_{it}) is observed after light soaking. Therefore, degradation in solar cell parameters occurs after light soaking due to increase in D_{it}.","abstract_html":"Impact of the SiN_x/n^+-Si interface on silicon solar cell performance was investigated, where SiN_x is used as a passivation layer. Significant shifts in capacitance, conductance and leakage current characteristics were observed for metal/SiN:H/n^+-Si MOS capacitor when it was subjected to a constant voltage stress (CVS) of +10V at room temperature. The interface trap density (D_{it}) across the SiN:H/n^+-Si interface increased from 6.3 x 10^9 to 7.5 x 10^9 cm^{-2} eV^{-1} after a 500-second stress whereas the n^+/p junction diode remained unaffected by the stress. A direct correlation between the degradation of SiN:H/Si interface and the solar cell performance was observed. It is seen that there is a decrease in the open-circuit voltage (V_{oc}) from 570 to 550 mV due to CVS. No significant change in short-circuit current (I_{sc}) is observed whereas the conversion efficiency ([eta]) decreases from 12.1 to 11.6% due to CVS. Therefore, the decrease in conversion efficiency by ~ 4.13% is due to increase in D_{it} after 500s stressing. CVS study on Cu/SiN_x/n^+ MOS capacitor both under dark and light illumination is carried out. It is observed that the degradation in solar cell parameters is more when the MOS capacitor is stressed under illumination compared to dark condition. It is also seen that there is a shift in both C-V and G-V characteristics after 5 hrs of light soaking. Thus, an increment in interface trap density (D_{it}) is observed after light soaking. Therefore, degradation in solar cell parameters occurs after light soaking due to increase in D_{it}.","abstract_has_math":false,"creators":["Sahoo, Santosh"],"institution":null,"degree_name":"Doctor of Philosophy in Materials Science and Engineering - (Ph.D.)","degree_level":null,"degree_discipline":"Committee for the Interdisciplinary Program in Materials Science and Engineering","degree_department":null,"school":null,"contributors":["N. M. Ravindra","Bhushan L. Sopori","Anthony Fiory"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2013,"date_issued":"2013-05-31T07:00:00Z","date_published":"2013-05-31T07:00:00Z","updated_at":"2026-07-24T03:22:19Z","subjects":["Constant voltage stress","Light induced degredation","Constant voltage illumination stress","Interface trap density","Positive bias stress","Negative bias illumination stress","Materials Science and Engineering"],"languages":[],"rights":[],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"https://digitalcommons.njit.edu/dissertations/378","outbound_label":"Repository record","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["N. M. Ravindra","Bhushan L. Sopori","Anthony Fiory"]},{"key":"dc:creator","label":"Author","values":["Sahoo, Santosh"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:type","label":"Dc Type","values":["Dissertation"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Committee for the Interdisciplinary Program in Materials Science and Engineering"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Doctor of Philosophy in Materials Science and Engineering - (Ph.D.)"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Constant voltage stress","Light induced degredation","Constant voltage illumination stress","Interface trap density","Positive bias stress","Negative bias illumination stress","Materials Science and Engineering"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["https://digitalcommons.njit.edu/dissertations/378"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["Impact of the SiN_x/n^+-Si interface on silicon solar cell performance was investigated, where SiN_x is used as a passivation layer. Significant shifts in capacitance, conductance and leakage current characteristics were observed for metal/SiN:H/n^+-Si MOS capacitor when it was subjected to a constant voltage stress (CVS) of +10V at room temperature. The interface trap density (D_{it}) across the SiN:H/n^+-Si interface increased from 6.3 x 10^9 to 7.5 x 10^9 cm^{-2} eV^{-1} after a 500-second stress whereas the n^+/p junction diode remained unaffected by the stress. A direct correlation between the degradation of SiN:H/Si interface and the solar cell performance was observed. It is seen that there is a decrease in the open-circuit voltage (V_{oc}) from 570 to 550 mV due to CVS. No significant change in short-circuit current (I_{sc}) is observed whereas the conversion efficiency ([eta]) decreases from 12.1 to 11.6% due to CVS. Therefore, the decrease in conversion efficiency by ~ 4.13% is due to increase in D_{it} after 500s stressing. CVS study on Cu/SiN_x/n^+ MOS capacitor both under dark and light illumination is carried out. It is observed that the degradation in solar cell parameters is more when the MOS capacitor is stressed under illumination compared to dark condition. It is also seen that there is a shift in both C-V and G-V characteristics after 5 hrs of light soaking. Thus, an increment in interface trap density (D_{it}) is observed after light soaking. Therefore, degradation in solar cell parameters occurs after light soaking due to increase in D_{it}."]},{"key":"dc:title","label":"Title","values":["Influence of SiNx/Si interface states on Si solar cells"]}]}],"canonical_facts":{"dc:contributor":["N. M. Ravindra","Bhushan L. Sopori","Anthony Fiory"],"dc:creator":["Sahoo, Santosh"],"dc:description.abstract":["Impact of the SiN_x/n^+-Si interface on silicon solar cell performance was investigated, where SiN_x is used as a passivation layer. Significant shifts in capacitance, conductance and leakage current characteristics were observed for metal/SiN:H/n^+-Si MOS capacitor when it was subjected to a constant voltage stress (CVS) of +10V at room temperature. The interface trap density (D_{it}) across the SiN:H/n^+-Si interface increased from 6.3 x 10^9 to 7.5 x 10^9 cm^{-2} eV^{-1} after a 500-second stress whereas the n^+/p junction diode remained unaffected by the stress. A direct correlation between the degradation of SiN:H/Si interface and the solar cell performance was observed. It is seen that there is a decrease in the open-circuit voltage (V_{oc}) from 570 to 550 mV due to CVS. No significant change in short-circuit current (I_{sc}) is observed whereas the conversion efficiency ([eta]) decreases from 12.1 to 11.6% due to CVS. Therefore, the decrease in conversion efficiency by ~ 4.13% is due to increase in D_{it} after 500s stressing. CVS study on Cu/SiN_x/n^+ MOS capacitor both under dark and light illumination is carried out. It is observed that the degradation in solar cell parameters is more when the MOS capacitor is stressed under illumination compared to dark condition. It is also seen that there is a shift in both C-V and G-V characteristics after 5 hrs of light soaking. Thus, an increment in interface trap density (D_{it}) is observed after light soaking. Therefore, degradation in solar cell parameters occurs after light soaking due to increase in D_{it}."],"dc:identifier":["https://digitalcommons.njit.edu/dissertations/378"],"dc:subject":["Constant voltage stress","Light induced degredation","Constant voltage illumination stress","Interface trap density","Positive bias stress","Negative bias illumination stress","Materials Science and Engineering"],"dc:title":["Influence of SiNx/Si interface states on Si solar cells"],"dc:type":["Dissertation"],"thesis:degree_discipline":["Committee for the Interdisciplinary Program in Materials Science and Engineering"],"thesis:degree_name":["Doctor of Philosophy in Materials Science and Engineering - (Ph.D.)"]},"updated_at":"2026-07-24T03:22:19Z"}