{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/9722"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/9722","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"Circuit level synthesis for delta-sigma converters","abstract":"Analog circuit design is a relatively complicated art that requires a high degree of erudition in the field. With this in mind, this thesis presents work on an analog circuit synthe­sis tool to minimize analog circuit design time. Specifically, the author has designed and implemented a discrete-time, one-bit, oversampling delta-sigma analog-to-digital modula­tor circuit synthesis tool in MATLAB script. With the parameters of center frequency, loop order, oversampling ratio, and minimum capacitor size, a user can utilize the pro­gram to generate a semi-optimized transistor level description of the modulator that can subsequently he used in SPICE. Parlaying Richard Schreier's work on a delta-sigma tool­box for MATLAB, the switched capacitor circuit contains robustly generated differential operational amplifiers and comparators. Furthermore, switched capacitors are scaled for minimal kT/C noise while switch sizes are synchronously adjusted to accommodate these values. Results of the SPICE simulations of the generated circuits compare favorably with the behaviorally predicted results.","abstract_html":"Analog circuit design is a relatively complicated art that requires a high degree of erudition in the field. With this in mind, this thesis presents work on an analog circuit synthe­sis tool to minimize analog circuit design time. Specifically, the author has designed and implemented a discrete-time, one-bit, oversampling delta-sigma analog-to-digital modula­tor circuit synthesis tool in MATLAB script. With the parameters of center frequency, loop order, oversampling ratio, and minimum capacitor size, a user can utilize the pro­gram to generate a semi-optimized transistor level description of the modulator that can subsequently he used in SPICE. Parlaying Richard Schreier's work on a delta-sigma tool­box for MATLAB, the switched capacitor circuit contains robustly generated differential operational amplifiers and comparators. Furthermore, switched capacitors are scaled for minimal kT/C noise while switch sizes are synchronously adjusted to accommodate these values. Results of the SPICE simulations of the generated circuits compare favorably with the behaviorally predicted results.","abstract_has_math":false,"creators":["Peng, Mark Shane, 1975-"],"institution":"Massachusetts Institute of Technology","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":"Massachusetts Institute of Technology. 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Results of the SPICE simulations of the generated circuits compare favorably with the behaviorally predicted results."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["S.M."]},{"key":"dc:format.mimetype","label":"Dc Format Mimetype","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Circuit level synthesis for delta-sigma converters"]}]}],"canonical_facts":{"dc:contributor.advisor":["Hae-Seung Lee."],"dc:contributor.department":["Massachusetts Institute of Technology. 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With the parameters of center frequency, loop order, oversampling ratio, and minimum capacitor size, a user can utilize the pro­gram to generate a semi-optimized transistor level description of the modulator that can subsequently he used in SPICE. Parlaying Richard Schreier's work on a delta-sigma tool­box for MATLAB, the switched capacitor circuit contains robustly generated differential operational amplifiers and comparators. Furthermore, switched capacitors are scaled for minimal kT/C noise while switch sizes are synchronously adjusted to accommodate these values. Results of the SPICE simulations of the generated circuits compare favorably with the behaviorally predicted results."],"dc:description.degree":["S.M."],"dc:format.mimetype":["application/pdf"],"dc:identifier.uri":["http://hdl.handle.net/1721.1/9722"],"dc:language.iso":["eng"],"dc:publisher":["Massachusetts Institute of Technology"],"dc:rights":["M.I.T. theses are protected by copyright. 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