Back to results

Massachusetts Institute of Technology

Assembly lead time reduction in a semiconductor capital equipment plant through constraint based scheduling

Abstract

dc:description.abstract

The assembly protocols for a semiconductor capital equipment machine were analyzed for potential lead time reduction. The objective of this study was to determine the minimum assembly lead time for the machine based on the constraints of design, space, and labor availability. An assembly requires the completion of a set of procedures that each contains assembly tasks. Precedence relationships between tasks indicate for each procedure what other tasks must be completed before it can start. Each procedure was assumed to have constant resource requirements throughout its duration. The Critical Path Method (CPM) was used to identify 13 procedures on the critical path, based on design and space constraints. A preliminary build schedule was developed that prioritized critical path procedures. A trial of this build schedule achieved an assembly lead time of 39 hours, resulting in a 70% reduction from the current average of 5.5 days. This trial was also accomplished with 76% of the average labor hours for assembly. A production build schedule with a lead time of 43 hours was developed based on the trial results. This schedule allows for production rates of up to 5 machines per week to be achieved with the current shift structure of the company, without the incurrence of overtime. A critical path drag analysis identified critical procedures with the highest potential for lead time reduction. The highest drag of a critical path item was 260 minutes, accounting for 10% of the assembly lead time.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Department of Mechanical Engineering.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2014

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Sedore, Blake William Clark
Advisor dc:contributor.advisor
  • Stephen C. Graves.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/93851
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/93851

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Sedore, Blake William Clark. Assembly lead time reduction in a semiconductor capital equipment plant through constraint based scheduling. Massachusetts Institute of Technology, 2014. http://hdl.handle.net/1721.1/93851