Abstract
dc:description.abstractNonvolatile memory and logic devices rely on the manipulation of domain walls in magnetic nanowires, and scaling of these devices requires an understanding of domain wall behavior as a function of the wire width. Due to the increased importance of edge roughness and microstructure in narrow lines, domain wall pinning increases dramatically as the wire dimensions decrease and stochastic behavior is expected depending on the distribution of pinning sites. This work reports on the field driven domain wall statistics in sub-100 nm wide nanowires made from Co films of 8 nm thickness made by an electron beam lithography and etching process that minimizes edge roughness.
Degree
thesis:*- Department dc:contributor.department
- Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
- Grantor dc:publisher
- Massachusetts Institute of Technology
- Year dc:date.issued
- 2014
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Siddiqui, Saima Afroz
- Advisor dc:contributor.advisor
-
- Marc A. Baldo.
Subjects
dc:subject × 1Rights
dc:rights- Statement dc:rights
-
- M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
- Licence dc:rights.uri
- Language dc:language.iso
- eng
Identifiers
dc:identifier.*- Handle dc:identifier.uri
- http://hdl.handle.net/1721.1/93838
- OAI identifier oai:identifier
- oai:dspace.mit.edu:1721.1/93838