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Massachusetts Institute of Technology

Automatic protoboard layout from circuit schematics

Abstract

dc:description.abstract

As an important component of the Circuits module of the first Introduction to Electrical Engineering and Computer Science course at MIT (6.01), students design and build several circuits over the course of three weeks. When working on the more intricate circuits, an unfortunately large proportion of students' lab time is spent on laying out the circuits on protoboards. This project introduces a new circuit schematic entry tool for 6.01, capable of automatically generating protoboard layouts for circuits that students may design in the course. The tool allows for students to build, analyze, and save circuit schematics through a graphical user interface and automatically generates protoboard layouts that are almost always easy to build and debug. The layout problem is solved by utilizing the A* search algorithm exactly as presented in 6.01.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2014

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Mekonnen, Michael
Advisor dc:contributor.advisor
  • Dennis M. Freeman and Adam J. Hartz.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/91847
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/91847

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Mekonnen, Michael. Automatic protoboard layout from circuit schematics. Massachusetts Institute of Technology, 2014. http://hdl.handle.net/1721.1/91847