{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/85774"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/85774","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"Component-derived manufacturing yield prediction in circuit card design and assembly","abstract":"Circuit card manufacturing can be a highly risky and volatile proposition due to the placement of hundreds of small, high value components. Operator mistakes, design errors, and defective parts lead to thousands of dollars in troubleshooting and rework costs per product. Raytheon Integrated Defense Systems (IDS) Circuit Card Assembly (CCA) manufactures highly complex circuit cards at a high mix / low volume scale for various purposes. Due to the high input variability and small production lot sizes of this level of circuit card manufacturing, historical trending and defect mitigation is difficult, causing a significant portion of CCA's manufacturing costs to be attributed to troubleshooting defects and rework. To mitigate these costs, yield prediction analysis software is utilized to predict potential manufacturing defect rates and first pass yields of new designs. This thesis describes the creation and testing of a new data analysis model for yield prediction. By gathering and processing data at an individual component level, the model can predict defect rates of designs at an assembly level. Collecting data at the individual component level drives more comprehensive component-based calculations, greatly improving yield prediction accuracy and thereby allowing cost effective circuit card designs to be created. The increase in prediction accuracy translates to a potential $250,000 saved annually for Raytheon CCA from early defect identification and removal. Updated data retrieval and calculation methods also allow for much easier model maintenance, thereby increasing the relevance of yield prediction. This model can be easily incorporated into other design software as a next step in creating comprehensive concurrent engineering tools.","abstract_html":"Circuit card manufacturing can be a highly risky and volatile proposition due to the placement of hundreds of small, high value components. Operator mistakes, design errors, and defective parts lead to thousands of dollars in troubleshooting and rework costs per product. Raytheon Integrated Defense Systems (IDS) Circuit Card Assembly (CCA) manufactures highly complex circuit cards at a high mix / low volume scale for various purposes. Due to the high input variability and small production lot sizes of this level of circuit card manufacturing, historical trending and defect mitigation is difficult, causing a significant portion of CCA&#x27;s manufacturing costs to be attributed to troubleshooting defects and rework. To mitigate these costs, yield prediction analysis software is utilized to predict potential manufacturing defect rates and first pass yields of new designs. This thesis describes the creation and testing of a new data analysis model for yield prediction. By gathering and processing data at an individual component level, the model can predict defect rates of designs at an assembly level. Collecting data at the individual component level drives more comprehensive component-based calculations, greatly improving yield prediction accuracy and thereby allowing cost effective circuit card designs to be created. The increase in prediction accuracy translates to a potential $250,000 saved annually for Raytheon CCA from early defect identification and removal. Updated data retrieval and calculation methods also allow for much easier model maintenance, thereby increasing the relevance of yield prediction. This model can be easily incorporated into other design software as a next step in creating comprehensive concurrent engineering tools.","abstract_has_math":false,"creators":["Trinh, Stephen"],"institution":"Massachusetts Institute of Technology","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":"Leaders for Global Operations Program at MIT","school":null,"contributors":[],"advisors":["Martin Culpepper and Roy Welsch."],"committee_chairs":[],"committee_members":[],"year":2013,"date_issued":"2013","date_published":"2013","updated_at":"2026-07-22T22:20:49Z","subjects":["Mechanical Engineering.","Sloan School of Management.","Leaders for Global Operations Program."],"languages":["eng"],"rights":["M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission."],"rights_urls":["http://dspace.mit.edu/handle/1721.1/7582"],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/1721.1/85774","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.advisor","label":"Advisor","values":["Martin Culpepper and Roy Welsch."]},{"key":"dc:contributor.department","label":"Department","values":["Leaders for Global Operations Program at MIT","Massachusetts Institute of Technology. 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They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission."]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://dspace.mit.edu/handle/1721.1/7582"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/1721.1/85774"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Thesis: M.B.A., Massachusetts Institute of Technology, Sloan School of Management, 2013. In conjunction with the Leaders for Global Operations Program at MIT.","Thesis: S.M., Massachusetts Institute of Technology, Department of Mechanical Engineering, 2013. In conjunction with the Leaders for Global Operations Program at MIT.","Cataloged from PDF version of thesis.","Includes bibliographical references (page 51)."]},{"key":"dc:description.abstract","label":"Abstract","values":["Circuit card manufacturing can be a highly risky and volatile proposition due to the placement of hundreds of small, high value components. Operator mistakes, design errors, and defective parts lead to thousands of dollars in troubleshooting and rework costs per product. Raytheon Integrated Defense Systems (IDS) Circuit Card Assembly (CCA) manufactures highly complex circuit cards at a high mix / low volume scale for various purposes. Due to the high input variability and small production lot sizes of this level of circuit card manufacturing, historical trending and defect mitigation is difficult, causing a significant portion of CCA's manufacturing costs to be attributed to troubleshooting defects and rework. To mitigate these costs, yield prediction analysis software is utilized to predict potential manufacturing defect rates and first pass yields of new designs. This thesis describes the creation and testing of a new data analysis model for yield prediction. By gathering and processing data at an individual component level, the model can predict defect rates of designs at an assembly level. Collecting data at the individual component level drives more comprehensive component-based calculations, greatly improving yield prediction accuracy and thereby allowing cost effective circuit card designs to be created. The increase in prediction accuracy translates to a potential $250,000 saved annually for Raytheon CCA from early defect identification and removal. Updated data retrieval and calculation methods also allow for much easier model maintenance, thereby increasing the relevance of yield prediction. This model can be easily incorporated into other design software as a next step in creating comprehensive concurrent engineering tools."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["M.B.A.","S.M."]},{"key":"dc:title","label":"Title","values":["Component-derived manufacturing yield prediction in circuit card design and assembly"]}]}],"canonical_facts":{"dc:contributor.advisor":["Martin Culpepper and Roy Welsch."],"dc:contributor.department":["Leaders for Global Operations Program at MIT","Massachusetts Institute of Technology. Department of Mechanical Engineering","Sloan School of Management"],"dc:contributor.other":["Leaders for Global Operations Program."],"dc:creator":["Trinh, Stephen"],"dc:date.accessioned":["2014-03-19T15:44:25Z"],"dc:date.available":["2014-03-19T15:44:25Z"],"dc:date.issued":["2013"],"dc:description":["Thesis: M.B.A., Massachusetts Institute of Technology, Sloan School of Management, 2013. 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Due to the high input variability and small production lot sizes of this level of circuit card manufacturing, historical trending and defect mitigation is difficult, causing a significant portion of CCA's manufacturing costs to be attributed to troubleshooting defects and rework. To mitigate these costs, yield prediction analysis software is utilized to predict potential manufacturing defect rates and first pass yields of new designs. This thesis describes the creation and testing of a new data analysis model for yield prediction. By gathering and processing data at an individual component level, the model can predict defect rates of designs at an assembly level. Collecting data at the individual component level drives more comprehensive component-based calculations, greatly improving yield prediction accuracy and thereby allowing cost effective circuit card designs to be created. The increase in prediction accuracy translates to a potential $250,000 saved annually for Raytheon CCA from early defect identification and removal. Updated data retrieval and calculation methods also allow for much easier model maintenance, thereby increasing the relevance of yield prediction. This model can be easily incorporated into other design software as a next step in creating comprehensive concurrent engineering tools."],"dc:description.degree":["M.B.A.","S.M."],"dc:identifier.uri":["http://hdl.handle.net/1721.1/85774"],"dc:language.iso":["eng"],"dc:publisher":["Massachusetts Institute of Technology"],"dc:rights":["M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission."],"dc:rights.uri":["http://dspace.mit.edu/handle/1721.1/7582"],"dc:subject":["Mechanical Engineering.","Sloan School of Management.","Leaders for Global Operations Program."],"dc:title":["Component-derived manufacturing yield prediction in circuit card design and assembly"],"dc:type":["Thesis"]},"updated_at":"2026-07-22T22:20:49Z"}