Hardware and software for a power-aware wireless microsensor node

This thesis examines important issues in the design of hardware and software for microsensor networks, with particular attention paid to mechanisms for providing power awareness. The [mu]AMPS Revision 1 microsensor node is used as an example. The design of this node implementation is described in detail, including, in particular, the design of the pAMPS processor board and its power-scalable architecture. The operating system and application programming interface for the node is described. Finally, an analysis is made of the power consumed by each of the node's subsystems, and these results are used to assess the degree of power-awareness provided by the [mu]AMPS Revision 1 node.

Department dc:contributor.department

Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.

Grantor dc:publisher

Massachusetts Institute of Technology

Year dc:date.issued

2002

Author dc:creator

• Ickes, Nathan J. (Nathan Jeffrey), 1979-

Advisor dc:contributor.advisor

• Anantha Chandrakasan.

• Electrical Engineering and Computer Science.

Statement dc:rights

• M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.

Licence dc:rights.uri

• http://dspace.mit.edu/handle/1721.1/7582

Language dc:language.iso

eng

Handle dc:identifier.uri

http://hdl.handle.net/1721.1/8080

OAI identifier oai:identifier

oai:dspace.mit.edu:1721.1/8080