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Massachusetts Institute of Technology

Modeling poly-silicon gate depletion in submicron MOS devices

Abstract

dc:description

Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
1999

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Li, James Chingwei, 1975-
Advisor dc:contributor.advisor
  • Stephen D. Senturia.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/80100
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/80100

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Li, James Chingwei, 1975-. Modeling poly-silicon gate depletion in submicron MOS devices. Massachusetts Institute of Technology, 1999. http://hdl.handle.net/1721.1/80100