{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/68490"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/68490","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"Integrated photonic analog-to-digital converters","abstract":"Accurate conversion of wideband multi-GHz analog signals into the digital domain has long been a target of analog-to-digital converter (ADC) developers, driven by applications in radar systems, software radio, medical imaging, and communication systems. Aperture jitter has been a major bottleneck on the way towards higher speeds and better accuracy. Photonic ADCs, which perform sampling using ultra-stable optical pulse trains generated by mode-locked lasers, have been investigated as a promising approach to overcome the jitter problem and bring ADC performance to new levels. This work demonstrates that the photonic approach can deliver on its promise by digitizing a 41 GHz signal with 7.0 effective bits and 52 dBc spur-free dynamic range (SFDR) using a discrete-component photonic ADC. This corresponds to 15 fs jitter, a 4-5 times improvement over the jitter of the best electronic ADCs, and an order of magnitude improvement over the jitter of electronic ADCs operating above 10 GHz. The feasibility of a practical photonic ADC is demonstrated by creating an integrated ADC with a modulator, filters, and photodetectors fabricated on a single silicon chip and using it to sample a 10 GHz signal with 3.5 effective bits and 39 dBc SFDR. In both experiments, a sample rate of 2.1 GSa/s was obtained by interleaving two 1.05 GSa/s channels; higher sample rates can be achieved by increasing the channel count. A key component of a multi-channel ADC - a dual multi-channel high-performance filter bank - is successfully implemented. A concept for broadband linearization of the silicon modulator, which is another critical component of the photonic ADC, is proposed. Nonlinear phenomena in silicon microring filters and their impact on ADC performance are analyzed, and methods to reduce this impact are proposed. The results presented in the thesis suggest that a practical integrated photonic ADC, which successfully overcomes the electronic jitter bottleneck, is possible today.","abstract_html":"Accurate conversion of wideband multi-GHz analog signals into the digital domain has long been a target of analog-to-digital converter (ADC) developers, driven by applications in radar systems, software radio, medical imaging, and communication systems. Aperture jitter has been a major bottleneck on the way towards higher speeds and better accuracy. Photonic ADCs, which perform sampling using ultra-stable optical pulse trains generated by mode-locked lasers, have been investigated as a promising approach to overcome the jitter problem and bring ADC performance to new levels. This work demonstrates that the photonic approach can deliver on its promise by digitizing a 41 GHz signal with 7.0 effective bits and 52 dBc spur-free dynamic range (SFDR) using a discrete-component photonic ADC. This corresponds to 15 fs jitter, a 4-5 times improvement over the jitter of the best electronic ADCs, and an order of magnitude improvement over the jitter of electronic ADCs operating above 10 GHz. The feasibility of a practical photonic ADC is demonstrated by creating an integrated ADC with a modulator, filters, and photodetectors fabricated on a single silicon chip and using it to sample a 10 GHz signal with 3.5 effective bits and 39 dBc SFDR. In both experiments, a sample rate of 2.1 GSa/s was obtained by interleaving two 1.05 GSa/s channels; higher sample rates can be achieved by increasing the channel count. A key component of a multi-channel ADC - a dual multi-channel high-performance filter bank - is successfully implemented. A concept for broadband linearization of the silicon modulator, which is another critical component of the photonic ADC, is proposed. Nonlinear phenomena in silicon microring filters and their impact on ADC performance are analyzed, and methods to reduce this impact are proposed. The results presented in the thesis suggest that a practical integrated photonic ADC, which successfully overcomes the electronic jitter bottleneck, is possible today.","abstract_has_math":false,"creators":["Khilo, Anatol (Anatol M.)"],"institution":"Massachusetts Institute of Technology","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":"Massachusetts Institute of Technology. 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This work demonstrates that the photonic approach can deliver on its promise by digitizing a 41 GHz signal with 7.0 effective bits and 52 dBc spur-free dynamic range (SFDR) using a discrete-component photonic ADC. This corresponds to 15 fs jitter, a 4-5 times improvement over the jitter of the best electronic ADCs, and an order of magnitude improvement over the jitter of electronic ADCs operating above 10 GHz. The feasibility of a practical photonic ADC is demonstrated by creating an integrated ADC with a modulator, filters, and photodetectors fabricated on a single silicon chip and using it to sample a 10 GHz signal with 3.5 effective bits and 39 dBc SFDR. In both experiments, a sample rate of 2.1 GSa/s was obtained by interleaving two 1.05 GSa/s channels; higher sample rates can be achieved by increasing the channel count. A key component of a multi-channel ADC - a dual multi-channel high-performance filter bank - is successfully implemented. A concept for broadband linearization of the silicon modulator, which is another critical component of the photonic ADC, is proposed. Nonlinear phenomena in silicon microring filters and their impact on ADC performance are analyzed, and methods to reduce this impact are proposed. The results presented in the thesis suggest that a practical integrated photonic ADC, which successfully overcomes the electronic jitter bottleneck, is possible today."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["Ph.D."]},{"key":"dc:title","label":"Title","values":["Integrated photonic analog-to-digital converters"]}]}],"canonical_facts":{"dc:contributor.advisor":["Franz X. Kärtner."],"dc:contributor.department":["Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science."],"dc:contributor.other":["Massachusetts Institute of Technology. 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In both experiments, a sample rate of 2.1 GSa/s was obtained by interleaving two 1.05 GSa/s channels; higher sample rates can be achieved by increasing the channel count. A key component of a multi-channel ADC - a dual multi-channel high-performance filter bank - is successfully implemented. A concept for broadband linearization of the silicon modulator, which is another critical component of the photonic ADC, is proposed. Nonlinear phenomena in silicon microring filters and their impact on ADC performance are analyzed, and methods to reduce this impact are proposed. The results presented in the thesis suggest that a practical integrated photonic ADC, which successfully overcomes the electronic jitter bottleneck, is possible today."],"dc:description.degree":["Ph.D."],"dc:identifier.uri":["http://hdl.handle.net/1721.1/68490"],"dc:language.iso":["eng"],"dc:publisher":["Massachusetts Institute of Technology"],"dc:rights":["M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission."],"dc:rights.uri":["http://dspace.mit.edu/handle/1721.1/7582"],"dc:subject":["Electrical Engineering and Computer Science."],"dc:title":["Integrated photonic analog-to-digital converters"],"dc:type":["Thesis"]},"updated_at":"2026-07-22T22:22:10Z"}