Equalized on-chip interconnect : modeling, analysis, and design

This thesis work explores the use of equalization techniques to improve throughput and reduce power consumption of on-chip interconnect. A theoretical model for an equalized on-chip interconnect is first suggested to provide mathematical formulation for the link behavior. Based on the model, a fast-design space exploration methodology is demonstrated to search for the optimal link design parameters (wire and circuit) and to generate the optimal performance-power trade-off curve for the equalized interconnects. This thesis also proposes new circuit techniques, which improve the revealed demerits of the conventional circuit topologies. The proposed charge-injection transmitter directly conducts pre-emphasis current from the supply into the channel, eliminating the power overhead of analog current subtraction in the conventional transmit pre-emphasis, while significantly relaxing the driver coefficient accuracy requirements. The transmitter utilizes a power efficient nonlinear driver by compensating non-linearity with pre-distorted equalization coefficients. A trans-impedance amplifier at the receiver achieves low static power consumption, large signal amplitude, and high bandwidth by mitigating limitations of purely-resistive termination. A test chip is fabricated in 90-nm bulk CMOS technology and tested over a 10 mm, 2[micro]m pitched on-chip differential wire. The transceiver consumes 0.37-0.63 pJ/b with 2-6 Gb/s/ch.

Department dc:contributor.department

Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.

Grantor dc:publisher

Massachusetts Institute of Technology

Year dc:date.issued

2010

Author dc:creator

• Kim, Byungsub, 1978-

Advisor dc:contributor.advisor

• Vladimir M. Stojanović.

• Electrical Engineering and Computer Science.

Statement dc:rights

• M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.

Licence dc:rights.uri

• http://dspace.mit.edu/handle/1721.1/7582

Language dc:language.iso

eng

Handle dc:identifier.uri

http://hdl.handle.net/1721.1/58076

OAI identifier oai:identifier

oai:dspace.mit.edu:1721.1/58076