{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/57780"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/57780","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"Self-aligned AlGaN/GaN transistors for sub-mm wave applications","abstract":"This thesis describes work done towards realizing self-aligned AlGaN/GaN high electron mobility transistors (HEMTs). Self-aligned transistors are important for improving the frequency of AlGaN/GaN HEMTs by reducing source and drain access resistance. The eventual fabrication of self-aligned transistors required the development of two different technologies that are described in this thesis. First, gate stacks that can survive the high temperature anneal necessary for forming ohmic contacts were demonstrated. Devices with three different gate stacks, composed of tungsten and a high-k dielectrics like HfO₂, A1₂O₃ and HfO₂/Ga₂O₃, were studied and compared with respect to DC transistor measurements, capacitor measurements and pulsed-IV measurements. Not only did these transistors survive the ohmic anneal but they showed superior performance with respect to transconductance, current density and dispersion than transistors with standard gates. Following the development of the gate stack, silicide-like technology where thin Ti-based films are deposited and annealed on the access regions to reduce access resistance was developed. Depositing and annealing thin Ti films were shown to reduce the sheet resistance by up to 30%. Finally, preliminary results regarding the fabrication of self-aligned transistors by using these gate stacks and the Ti-based access region metallization are reported in this thesis.","abstract_html":"This thesis describes work done towards realizing self-aligned AlGaN/GaN high electron mobility transistors (HEMTs). Self-aligned transistors are important for improving the frequency of AlGaN/GaN HEMTs by reducing source and drain access resistance. The eventual fabrication of self-aligned transistors required the development of two different technologies that are described in this thesis. First, gate stacks that can survive the high temperature anneal necessary for forming ohmic contacts were demonstrated. Devices with three different gate stacks, composed of tungsten and a high-k dielectrics like HfO₂, A1₂O₃ and HfO₂/Ga₂O₃, were studied and compared with respect to DC transistor measurements, capacitor measurements and pulsed-IV measurements. Not only did these transistors survive the ohmic anneal but they showed superior performance with respect to transconductance, current density and dispersion than transistors with standard gates. Following the development of the gate stack, silicide-like technology where thin Ti-based films are deposited and annealed on the access regions to reduce access resistance was developed. Depositing and annealing thin Ti films were shown to reduce the sheet resistance by up to 30%. Finally, preliminary results regarding the fabrication of self-aligned transistors by using these gate stacks and the Ti-based access region metallization are reported in this thesis.","abstract_has_math":false,"creators":["Saadat, Omair I"],"institution":"Massachusetts Institute of Technology","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":"Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.","school":null,"contributors":[],"advisors":["Tomás Palacios."],"committee_chairs":[],"committee_members":[],"year":2010,"date_issued":"2010","date_published":"2010","updated_at":"2026-07-22T22:22:15Z","subjects":["Electrical Engineering and Computer Science."],"languages":["eng"],"rights":["M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission."],"rights_urls":["http://dspace.mit.edu/handle/1721.1/7582"],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/1721.1/57780","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.advisor","label":"Advisor","values":["Tomás Palacios."]},{"key":"dc:contributor.department","label":"Department","values":["Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science."]},{"key":"dc:contributor.other","label":"Dc Contributor Other","values":["Massachusetts Institute of Technology. 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Self-aligned transistors are important for improving the frequency of AlGaN/GaN HEMTs by reducing source and drain access resistance. The eventual fabrication of self-aligned transistors required the development of two different technologies that are described in this thesis. First, gate stacks that can survive the high temperature anneal necessary for forming ohmic contacts were demonstrated. Devices with three different gate stacks, composed of tungsten and a high-k dielectrics like HfO₂, A1₂O₃ and HfO₂/Ga₂O₃, were studied and compared with respect to DC transistor measurements, capacitor measurements and pulsed-IV measurements. Not only did these transistors survive the ohmic anneal but they showed superior performance with respect to transconductance, current density and dispersion than transistors with standard gates. Following the development of the gate stack, silicide-like technology where thin Ti-based films are deposited and annealed on the access regions to reduce access resistance was developed. Depositing and annealing thin Ti films were shown to reduce the sheet resistance by up to 30%. Finally, preliminary results regarding the fabrication of self-aligned transistors by using these gate stacks and the Ti-based access region metallization are reported in this thesis."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["S.M."]},{"key":"dc:title","label":"Title","values":["Self-aligned AlGaN/GaN transistors for sub-mm wave applications"]}]}],"canonical_facts":{"dc:contributor.advisor":["Tomás Palacios."],"dc:contributor.department":["Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science."],"dc:contributor.other":["Massachusetts Institute of Technology. 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Devices with three different gate stacks, composed of tungsten and a high-k dielectrics like HfO₂, A1₂O₃ and HfO₂/Ga₂O₃, were studied and compared with respect to DC transistor measurements, capacitor measurements and pulsed-IV measurements. Not only did these transistors survive the ohmic anneal but they showed superior performance with respect to transconductance, current density and dispersion than transistors with standard gates. Following the development of the gate stack, silicide-like technology where thin Ti-based films are deposited and annealed on the access regions to reduce access resistance was developed. Depositing and annealing thin Ti films were shown to reduce the sheet resistance by up to 30%. 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