{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/54203"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/54203","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"Mechanism and assessment of spin transfer torque (STT) based memory","abstract":"When a sufficient current density passes through the MTJ, the spin-polarized current will exert a spin transfer torque to switch the magnetization of the free layer. This is the fundamental of the novel write mechanism in STT-RAM, current-induced magnetization switching. It allows STT-RAM to have a smaller cell size and write current than MRAM, and also capable of what MRAM promises: fast, dense, and non-volatile. A technological assessment was conducted to verify the claims of STT-RAM by understanding the physical principles behind it. A comparison of performance parameters in various memory technologies was also made. STT-RAM scores well in all aspect except in the size of the memory cell. The high current density (>10⁶ A/cm²) sets the lower limit of the size of the driving transistor and ultimately the cost of manufacturing STT-RAM. Cost models were presented to estimate the cost of a STT-RAM based on a three mask levels fabrication process. Although much effort has been put into reducing the switching current density, there are still no easy solutions to the problem. Research and development of STT-RAM must show success in a very near future or else STT-RAM will follow the step of its predecessor, MRAM: surviving in the niche market.","abstract_html":"When a sufficient current density passes through the MTJ, the spin-polarized current will exert a spin transfer torque to switch the magnetization of the free layer. This is the fundamental of the novel write mechanism in STT-RAM, current-induced magnetization switching. It allows STT-RAM to have a smaller cell size and write current than MRAM, and also capable of what MRAM promises: fast, dense, and non-volatile. A technological assessment was conducted to verify the claims of STT-RAM by understanding the physical principles behind it. A comparison of performance parameters in various memory technologies was also made. STT-RAM scores well in all aspect except in the size of the memory cell. The high current density (>10⁶ A/cm²) sets the lower limit of the size of the driving transistor and ultimately the cost of manufacturing STT-RAM. Cost models were presented to estimate the cost of a STT-RAM based on a three mask levels fabrication process. Although much effort has been put into reducing the switching current density, there are still no easy solutions to the problem. Research and development of STT-RAM must show success in a very near future or else STT-RAM will follow the step of its predecessor, MRAM: surviving in the niche market.","abstract_has_math":false,"creators":["Loh, Iong Ying"],"institution":"Massachusetts Institute of Technology","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":"Massachusetts Institute of Technology. Dept. of Materials Science and Engineering.","school":null,"contributors":[],"advisors":["David I. Paul and Geoffrey Beach."],"committee_chairs":[],"committee_members":[],"year":2009,"date_issued":"2009","date_published":"2009","updated_at":"2026-07-22T22:21:24Z","subjects":["Materials Science and Engineering."],"languages":["eng"],"rights":["M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission."],"rights_urls":["http://dspace.mit.edu/handle/1721.1/7582"],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/1721.1/54203","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.advisor","label":"Advisor","values":["David I. Paul and Geoffrey Beach."]},{"key":"dc:contributor.department","label":"Department","values":["Massachusetts Institute of Technology. Dept. of Materials Science and Engineering."]},{"key":"dc:contributor.other","label":"Dc Contributor Other","values":["Massachusetts Institute of Technology. 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They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission."]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://dspace.mit.edu/handle/1721.1/7582"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/1721.1/54203"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2009.","This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.","Cataloged from student submitted PDF version of thesis.","Includes bibliographical references (p. 61-70)."]},{"key":"dc:description.abstract","label":"Abstract","values":["When a sufficient current density passes through the MTJ, the spin-polarized current will exert a spin transfer torque to switch the magnetization of the free layer. This is the fundamental of the novel write mechanism in STT-RAM, current-induced magnetization switching. It allows STT-RAM to have a smaller cell size and write current than MRAM, and also capable of what MRAM promises: fast, dense, and non-volatile. A technological assessment was conducted to verify the claims of STT-RAM by understanding the physical principles behind it. A comparison of performance parameters in various memory technologies was also made. STT-RAM scores well in all aspect except in the size of the memory cell. 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