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Massachusetts Institute of Technology

Wireless reconfigurability of fault-tolerant processing systems

Abstract

dc:description.abstract

This thesis examines the use of wireless data buses for communication in a real-time computer system designed for applications with high reliability requirements. This work is based on the Draper Laboratory Software Based Redundancy Management System (SBRMS), which is a fault-tolerant system architecture that uses data exchange and voting via Ethernet connections between redundant hardware components to detect and recover from faults. For this thesis, a triplex redundant system was developed that utilized the key features from the SBRMS design, including commercial-off-the-shelf hardware components and robust software partitioning, while replacing the standard Ethernet connection with a wireless Ethernet connection. The implementation of this system is presented and the benefits and potential applications of such a system are discussed.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2008

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Tang, Melinda Y
Advisor dc:contributor.advisor
  • Joseph A. Kochocki and Barbara H. Liskov.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/53168
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/53168

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Tang, Melinda Y. Wireless reconfigurability of fault-tolerant processing systems. Massachusetts Institute of Technology, 2008. http://hdl.handle.net/1721.1/53168