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Massachusetts Institute of Technology

Nonvolatile memory devices with colloidal, 1.0 nm silicon nanoparticles : principles of operation, fabrication, measurements, and analysis

Abstract

dc:description.abstract

Silicon nanoparticles are candidate charge trapping and storage elements for future high density, low-voltage nonvolatile memory devices. Most previous works have studied nanoparticles of larger than 5 nm size and exhibited bulk-like trapping characteristics. Technologically viable and competitive future devices, however, will require nanoparticles of sub 3-nm dimensions; a zero-dimensional regime where significant changes to silicon electronic structure occur. In this thesis, the physical processes involved in charge based nonvolatile memory device operation with colloidal mono-disperse 1.0 nm silicon nanoparticles embedded in a metal-oxide-semiconductor (MOS) gate stack is studied for the first time. Spin-coating was used to uniformly deliver the nanoparticle colloid across 150 mm wafers with density control over a thin tunneling oxide. Material characterization via spectroscopic ellipsometry, atomic force microscopy and transmission electron microscopy showed that across wafer sub-monolayer coverage with low-levels of agglomeration was achieved with nanoparticles so positioned possibly due to solvent-mediated self-assembly effects, and that the intrinsic nanoparticle crystallinity was intact after complete device processing. MOS capacitors with Si nanoparticles embedded in their dielectric exhibit strong endurance and well-behaved impedance (capacitance-voltage) characteristics with persistent hysteresis and only 53 mV standard deviation across wafer. Measurements showed that successive dilution of the nanoparticle colloid correlated directly with a decreased measured hysteresis and similarly fabricated zero-nanoparticle control devices exhibited a negligible hysteresis. Systems with 1.0 nm nanoparticles exhibited pure hole storage.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2009

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Nayfeh, Osama Munir, 1980-
Advisor dc:contributor.advisor
  • Dimitri A. Antoniadis.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/47785
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/47785

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
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citation

Nayfeh, Osama Munir, 1980-. Nonvolatile memory devices with colloidal, 1.0 nm silicon nanoparticles : principles of operation, fabrication, measurements, and analysis. Massachusetts Institute of Technology, 2009. http://hdl.handle.net/1721.1/47785