{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/47694"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/47694","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"A 1394 bus interface for the Chidi media processor","abstract":"The Chidi reconfigurable media processor requires a low-cost, scalable data link for media and sensor I/O. This paper describes a 1394 Serial Bus interface for the Chidi processor, which allows for routing of data between network nodes and supports capture of DV camera output. The scope of the research covers design and implementation from the 1394 software drivers down to the physical layer. Off-the-shelf chips are used to implement the 1394 physical and link layers. Logic implemented on a Field Programmable Gate Array facilitates transfer of data from Chidi's general purpose processor and system memory to the link layer and vice versa. This research was funded by the Digital Life Consortium at the MIT Media Laboratory.","abstract_html":"The Chidi reconfigurable media processor requires a low-cost, scalable data link for media and sensor I/O. This paper describes a 1394 Serial Bus interface for the Chidi processor, which allows for routing of data between network nodes and supports capture of DV camera output. The scope of the research covers design and implementation from the 1394 software drivers down to the physical layer. Off-the-shelf chips are used to implement the 1394 physical and link layers. Logic implemented on a Field Programmable Gate Array facilitates transfer of data from Chidi's general purpose processor and system memory to the link layer and vice versa. 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