Massachusetts Institute of Technology
Demonstrating effective all-optical processing in ultrafast data networks using semiconductor optical amplifiers
Abstract
dc:description.abstractThe demand for bandwidth in worldwide data networks continues to increase due to growing Internet use and high-bandwidth applications such as video. All-optical signal processing is one promising technique for providing the necessary capacity and offers payload transparency, power consumption which scales efficiently with increasing bit rates, reduced processing latency, and ultrafast performance. In this thesis, we focus on using semiconductor optical amplifier-based logic gates to address both routing and regeneration needs in ultrafast data networks. To address routing needs, we demonstrate a scalable, multi-packet all-optical header processing unit operating at a line rate of 40 Gb/s. For this experiment, we used the ultrafast nonlinear interferometer (UNI) gate, a discrete optical logic gate which has been demonstrated at speeds of 100 Gb/s for bit-wise switching. However, for all-optical switching to become a reality, integration is necessary to significantly reduce the cost of manufacturing, installation, and operation. One promising integrated all-optical logic gate is the semiconductor optical amplifier Mach-Zehnder interferometer (SOA-MZI). This gate has previously been demonstrated capable of up to 80 Gb/s bit-wise switching operation. To enable simple installation and operation of this gate, we developed a performance optimization method which can quickly and accurately pinpoint the optimal operating point of the switch. This eliminates the need for a time-intensive search over a large parameter space and significantly simplifies the operation of the switch. With this method, we demonstrate the ability of a single SOA-MZI logic gate to regenerate ultrafast pulses over 100 passes and 10,000 km in a regenerative loop. Ultimately, all-optical logic gates must be integrated on a single low-cost platform and demonstrated in cascaded, multi-gate operation for increased functionality.
Degree
thesis:*- Department dc:contributor.department
- Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
- Grantor dc:publisher
- Massachusetts Institute of Technology
- Year dc:date.issued
- 2008
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Wang, Jade P. (Jade Peilynn), 1979-
- Advisor dc:contributor.advisor
-
- Erich P. Ippen and Scott A. Hamilton.
Subjects
dc:subject × 1Rights
dc:rights- Statement dc:rights
-
- M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
- Licence dc:rights.uri
- Language dc:language.iso
- eng
Identifiers
dc:identifier.*- Handle dc:identifier.uri
- http://hdl.handle.net/1721.1/44907
- OAI identifier oai:identifier
- oai:dspace.mit.edu:1721.1/44907