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Massachusetts Institute of Technology

Strategies for manufacturing low volume semiconductor products in a high volume manufacturing environment

Abstract

dc:description.abstract

The rapid growth of the digital communications market has prompted several large semiconductor manufacturers, including Intel Corporation, to begin the design and manufacture of communication ICs. The communications ICs are currently produced in much lower volumes than products such as microprocessors and memory. These low-volume products have been reported to cause operational problems, such as excessive cost, slow throughput time, and low yield when manufactured in semiconductor fabs designed for high volume manufacturing. This thesis examines the operational problems caused by the manufacture of low-volume semiconductor products and explores potential improvements. A financial model was developed to compare the cost of manufacturing low-volume products using several different strategies in existing high-volume fabs. The model results demonstrated that mask set cost, a fixed cost, becomes a very large component of total production cost as the product volume is reduced. Further, this model identified multi-product wafers, a scheme of fabricating several products on a single wafer, as a strategy with potential for savings up to approximately 75% of the manufacturing cost of low-volume products. A second financial model was developed to consider more detailed aspects of fabricating products on multi-product wafers. This model considered the sensitivity of the potential cost savings to changes in demand and changes to the design of multi-product wafers. This model also demonstrated that significant savings are possible with the multi-product wafer strategy, especially if the products are carefully matched (by die size and demand) with other products on the multi-product wafer. Finally, a brief organizational study was conducted to analyze the implementation of a multi-product wafer manufacturing process for the production of low-volume CMOS ICs at Intel Corporation.

Degree

thesis:*
Department dc:contributor.department
Leaders for Manufacturing Program at MIT
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2002

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Scholtz, Robert L. (Robert Louis), 1972-
Advisor dc:contributor.advisor
  • Jesús A. del Alamo and Stephen C. Graves.

Subjects

dc:subject × 3

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/44608
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/44608

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Scholtz, Robert L. (Robert Louis), 1972-. Strategies for manufacturing low volume semiconductor products in a high volume manufacturing environment. Massachusetts Institute of Technology, 2002. http://hdl.handle.net/1721.1/44608