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Massachusetts Institute of Technology

Constraint satisfaction modules : a methodology for analog circuit design

Abstract

dc:description.abstract

This dissertation describes a methodology for solving convex constraint problems using analog circuits. It demonstrates how this methodology can be used to design circuits that solve function-fitting problems through iterated gradient descent. In particular, it shows how to build a small circuit that can model a nonlinearity by observation, and predistort to compensate for this nonlinearity. The system fits into a broader effort to investigate non-traditional approaches to circuit design. First, it breaks the traditional input-output abstraction barrier; all ports are bidirectional. Second, it uses a different methodology for proving system stability with local rather than global properties. Such stability arguments can be scaled to much more complex systems than traditional stability criteria.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2007

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Mitros, Piotr, 1979-
Advisor dc:contributor.advisor
  • Gerald Jay Sussman and Thomas F. Knight, Jr.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/42237
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/42237

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Mitros, Piotr, 1979-. Constraint satisfaction modules : a methodology for analog circuit design. Massachusetts Institute of Technology, 2007. http://hdl.handle.net/1721.1/42237