A hierarchical bottom-up, equation-based optimization design methodology

We have implemented a segment of an RF transmitter signal chain in discrete components using bipolar transistors. We formulated both a broadband amplifier and mixer as mathematical programs (MP) and extracted Pareto-optimal (PO) [1-3] tradeoff surfaces. Abstracting these PO surfaces in place of the blocks at the system level, we have demonstrated a new hierarchical system design methodology. Furthermore, the optimization, simulation, and measured results are consistent at all levels of hierarchy. Keywords: System design, optimization, geometric programming, analog circuits, Pareto-optimal.

Department dc:contributor.department

Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.

Grantor dc:publisher

Massachusetts Institute of Technology

Year dc:date.issued

2007

Author dc:creator

• Sanchez, William R

Advisor dc:contributor.advisor

• Joel Dawson.

• Electrical Engineering and Computer Science.

Statement dc:rights

• M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.

Licence dc:rights.uri

• http://dspace.mit.edu/handle/1721.1/7582

Language dc:language.iso

eng

Handle dc:identifier.uri

http://hdl.handle.net/1721.1/41548

OAI identifier oai:identifier

oai:dspace.mit.edu:1721.1/41548